183d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
2e8428d6fSNishanth Menon /*
3e8428d6fSNishanth Menon  * Common configuration header file for all Keystone II EVM platforms
4e8428d6fSNishanth Menon  *
5e8428d6fSNishanth Menon  * (C) Copyright 2012-2014
6e8428d6fSNishanth Menon  *     Texas Instruments Incorporated, <www.ti.com>
7e8428d6fSNishanth Menon  */
8e8428d6fSNishanth Menon 
9e8428d6fSNishanth Menon #ifndef __CONFIG_KS2_EVM_H
10e8428d6fSNishanth Menon #define __CONFIG_KS2_EVM_H
11e8428d6fSNishanth Menon 
12e8428d6fSNishanth Menon #define CONFIG_SOC_KEYSTONE
13e8428d6fSNishanth Menon 
14e8428d6fSNishanth Menon /* U-Boot Build Configuration */
15e8428d6fSNishanth Menon #define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is a 2nd stage loader */
16e8428d6fSNishanth Menon 
17e8428d6fSNishanth Menon /* SoC Configuration */
18e8428d6fSNishanth Menon #define CONFIG_ARCH_CPU_INIT
19e8428d6fSNishanth Menon #define CONFIG_SPL_TARGET		"u-boot-spi.gph"
20e8428d6fSNishanth Menon #define CONFIG_SYS_DCACHE_OFF
21e8428d6fSNishanth Menon 
22e8428d6fSNishanth Menon /* Memory Configuration */
23e8428d6fSNishanth Menon #define CONFIG_SYS_LPAE_SDRAM_BASE	0x800000000
24e8428d6fSNishanth Menon #define CONFIG_MAX_RAM_BANK_SIZE	(2 << 30)       /* 2GB */
25401f2d91SLokesh Vutla #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SPL_TEXT_BASE - \
26e8428d6fSNishanth Menon 					GENERATED_GBL_DATA_SIZE)
27e8428d6fSNishanth Menon 
28aaf461f9SLokesh Vutla #ifdef CONFIG_SYS_MALLOC_F_LEN
29aaf461f9SLokesh Vutla #define SPL_MALLOC_F_SIZE	CONFIG_SYS_MALLOC_F_LEN
30aaf461f9SLokesh Vutla #else
31aaf461f9SLokesh Vutla #define SPL_MALLOC_F_SIZE	0
32aaf461f9SLokesh Vutla #endif
33aaf461f9SLokesh Vutla 
34e8428d6fSNishanth Menon /* SPL SPI Loader Configuration */
35e8428d6fSNishanth Menon #define CONFIG_SPL_PAD_TO		65536
36e8428d6fSNishanth Menon #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_PAD_TO - 8)
37e8428d6fSNishanth Menon #define CONFIG_SPL_BSS_START_ADDR	(CONFIG_SPL_TEXT_BASE + \
38e8428d6fSNishanth Menon 					CONFIG_SPL_MAX_SIZE)
39e8428d6fSNishanth Menon #define CONFIG_SPL_BSS_MAX_SIZE		(32 * 1024)
40e8428d6fSNishanth Menon #define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
41e8428d6fSNishanth Menon 					CONFIG_SPL_BSS_MAX_SIZE)
42e8428d6fSNishanth Menon #define CONFIG_SYS_SPL_MALLOC_SIZE	(32 * 1024)
438ccdba8bSPhil Edworthy #define KEYSTONE_SPL_STACK_SIZE		(8 * 1024)
44e8428d6fSNishanth Menon #define CONFIG_SPL_STACK		(CONFIG_SYS_SPL_MALLOC_START + \
45e8428d6fSNishanth Menon 					CONFIG_SYS_SPL_MALLOC_SIZE + \
46aaf461f9SLokesh Vutla 					SPL_MALLOC_F_SIZE + \
478ccdba8bSPhil Edworthy 					KEYSTONE_SPL_STACK_SIZE - 4)
48e8428d6fSNishanth Menon #define CONFIG_SYS_SPI_U_BOOT_OFFS	CONFIG_SPL_PAD_TO
49e8428d6fSNishanth Menon 
50a4562d06SFranklin S Cooper Jr /* SRAM scratch space entries  */
51a4562d06SFranklin S Cooper Jr #define SRAM_SCRATCH_SPACE_ADDR	CONFIG_SPL_STACK + 0x8
52a4562d06SFranklin S Cooper Jr 
53a4562d06SFranklin S Cooper Jr #define TI_SRAM_SCRATCH_BOARD_EEPROM_START	(SRAM_SCRATCH_SPACE_ADDR)
54a4562d06SFranklin S Cooper Jr #define TI_SRAM_SCRATCH_BOARD_EEPROM_END	(SRAM_SCRATCH_SPACE_ADDR + 0x200)
55a4562d06SFranklin S Cooper Jr #define KEYSTONE_SRAM_SCRATCH_SPACE_END		(TI_SRAM_SCRATCH_BOARD_EEPROM_END)
56a4562d06SFranklin S Cooper Jr 
57e8428d6fSNishanth Menon /* UART Configuration */
58e8428d6fSNishanth Menon #define CONFIG_SYS_NS16550_MEM32
59391839fbSLokesh Vutla #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
60391839fbSLokesh Vutla #define CONFIG_SYS_NS16550_SERIAL
61e8428d6fSNishanth Menon #define CONFIG_SYS_NS16550_REG_SIZE	-4
62391839fbSLokesh Vutla #endif
63e8428d6fSNishanth Menon #define CONFIG_SYS_NS16550_COM1		KS2_UART0_BASE
64e8428d6fSNishanth Menon #define CONFIG_SYS_NS16550_COM2		KS2_UART1_BASE
65e8428d6fSNishanth Menon 
66e6d71e1cSVitaly Andrianov #ifndef CONFIG_SOC_K2G
6743ebbfc3SMasahiro Yamada #define CONFIG_SYS_NS16550_CLK		ks_clk_get_rate(KS2_CLK1_6)
68e6d71e1cSVitaly Andrianov #else
6943ebbfc3SMasahiro Yamada #define CONFIG_SYS_NS16550_CLK		ks_clk_get_rate(uart_pll_clk) / 2
70e6d71e1cSVitaly Andrianov #endif
71e6d71e1cSVitaly Andrianov 
72e8428d6fSNishanth Menon /* SPI Configuration */
7343ebbfc3SMasahiro Yamada #define CONFIG_SYS_SPI_CLK		ks_clk_get_rate(KS2_CLK1_6)
74e8428d6fSNishanth Menon #define CONFIG_SF_DEFAULT_SPEED		30000000
75e8428d6fSNishanth Menon #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
76e8428d6fSNishanth Menon #define CONFIG_SYS_SPI0
77e8428d6fSNishanth Menon #define CONFIG_SYS_SPI_BASE		KS2_SPI0_BASE
78e8428d6fSNishanth Menon #define CONFIG_SYS_SPI0_NUM_CS		4
79e8428d6fSNishanth Menon #define CONFIG_SYS_SPI1
80e8428d6fSNishanth Menon #define CONFIG_SYS_SPI1_BASE		KS2_SPI1_BASE
81e8428d6fSNishanth Menon #define CONFIG_SYS_SPI1_NUM_CS		4
82e8428d6fSNishanth Menon #define CONFIG_SYS_SPI2
83e8428d6fSNishanth Menon #define CONFIG_SYS_SPI2_BASE		KS2_SPI2_BASE
84e8428d6fSNishanth Menon #define CONFIG_SYS_SPI2_NUM_CS		4
8539832244SVignesh R #ifdef CONFIG_SPL_BUILD
8639832244SVignesh R #undef CONFIG_DM_SPI
8739832244SVignesh R #undef CONFIG_DM_SPI_FLASH
8839832244SVignesh R #endif
89e8428d6fSNishanth Menon 
90e8428d6fSNishanth Menon /* Network Configuration */
91e8428d6fSNishanth Menon #define CONFIG_BOOTP_DEFAULT
92e8428d6fSNishanth Menon #define CONFIG_BOOTP_DNS2
93e8428d6fSNishanth Menon #define CONFIG_BOOTP_SEND_HOSTNAME
94e8428d6fSNishanth Menon #define CONFIG_NET_RETRY_COUNT		32
95e8428d6fSNishanth Menon #define CONFIG_SYS_SGMII_REFCLK_MHZ	312
96e8428d6fSNishanth Menon #define CONFIG_SYS_SGMII_LINERATE_MHZ	1250
97e8428d6fSNishanth Menon #define CONFIG_SYS_SGMII_RATESCALE	2
98e8428d6fSNishanth Menon 
99e8428d6fSNishanth Menon /* Keyston Navigator Configuration */
100e8428d6fSNishanth Menon #define CONFIG_TI_KSNAV
101e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_BASE_ADDRESS		KS2_QM_BASE_ADDRESS
102e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_CONF_BASE		KS2_QM_CONF_BASE
103e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_DESC_SETUP_BASE		KS2_QM_DESC_SETUP_BASE
104e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_STATUS_RAM_BASE		KS2_QM_STATUS_RAM_BASE
105e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_INTD_CONF_BASE		KS2_QM_INTD_CONF_BASE
106e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_PDSP1_CMD_BASE		KS2_QM_PDSP1_CMD_BASE
107e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE		KS2_QM_PDSP1_CTRL_BASE
108e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE		KS2_QM_PDSP1_IRAM_BASE
109e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE	KS2_QM_MANAGER_QUEUES_BASE
110e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE	KS2_QM_MANAGER_Q_PROXY_BASE
111e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE	KS2_QM_QUEUE_STATUS_BASE
112e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_LINK_RAM_BASE		KS2_QM_LINK_RAM_BASE
113e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_REGION_NUM		KS2_QM_REGION_NUM
114e8428d6fSNishanth Menon #define CONFIG_KSNAV_QM_QPOOL_NUM		KS2_QM_QPOOL_NUM
115e8428d6fSNishanth Menon 
116e8428d6fSNishanth Menon /* NETCP pktdma */
117e8428d6fSNishanth Menon #define CONFIG_KSNAV_PKTDMA_NETCP
118e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE	KS2_NETCP_PDMA_CTRL_BASE
119e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_TX_BASE		KS2_NETCP_PDMA_TX_BASE
120e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM	KS2_NETCP_PDMA_TX_CH_NUM
121e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_RX_BASE		KS2_NETCP_PDMA_RX_BASE
122e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM	KS2_NETCP_PDMA_RX_CH_NUM
123e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE	KS2_NETCP_PDMA_SCHED_BASE
124e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE	KS2_NETCP_PDMA_RX_FLOW_BASE
125e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM	KS2_NETCP_PDMA_RX_FLOW_NUM
126e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE	KS2_NETCP_PDMA_RX_FREE_QUEUE
127e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE	KS2_NETCP_PDMA_RX_RCV_QUEUE
128e8428d6fSNishanth Menon #define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE	KS2_NETCP_PDMA_TX_SND_QUEUE
129e8428d6fSNishanth Menon 
130e8428d6fSNishanth Menon /* Keystone net */
131e8428d6fSNishanth Menon #define CONFIG_KSNET_MAC_ID_BASE		KS2_MAC_ID_BASE_ADDR
132e8428d6fSNishanth Menon #define CONFIG_KSNET_NETCP_BASE			KS2_NETCP_BASE
133e8428d6fSNishanth Menon #define CONFIG_KSNET_SERDES_SGMII_BASE		KS2_SGMII_SERDES_BASE
134e8428d6fSNishanth Menon #define CONFIG_KSNET_SERDES_SGMII2_BASE		KS2_SGMII_SERDES2_BASE
135e8428d6fSNishanth Menon #define CONFIG_KSNET_SERDES_LANES_PER_SGMII	KS2_LANES_PER_SGMII_SERDES
136e8428d6fSNishanth Menon 
137e8428d6fSNishanth Menon /* SerDes */
138e8428d6fSNishanth Menon #define CONFIG_TI_KEYSTONE_SERDES
139e8428d6fSNishanth Menon 
140e8428d6fSNishanth Menon #define CONFIG_AEMIF_CNTRL_BASE		KS2_AEMIF_CNTRL_BASE
141e8428d6fSNishanth Menon 
142e8428d6fSNishanth Menon /* I2C Configuration */
143e8428d6fSNishanth Menon #define CONFIG_SYS_DAVINCI_I2C_SPEED	100000
144e8428d6fSNishanth Menon #define CONFIG_SYS_DAVINCI_I2C_SLAVE	0x10 /* SMBus host address */
145e8428d6fSNishanth Menon #define CONFIG_SYS_DAVINCI_I2C_SPEED1	100000
146e8428d6fSNishanth Menon #define CONFIG_SYS_DAVINCI_I2C_SLAVE1	0x10 /* SMBus host address */
147e8428d6fSNishanth Menon #define CONFIG_SYS_DAVINCI_I2C_SPEED2	100000
148e8428d6fSNishanth Menon #define CONFIG_SYS_DAVINCI_I2C_SLAVE2	0x10 /* SMBus host address */
149e8428d6fSNishanth Menon 
150e8428d6fSNishanth Menon /* EEPROM definitions */
151e8428d6fSNishanth Menon #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
152e8428d6fSNishanth Menon #define CONFIG_SYS_I2C_EEPROM_ADDR		0x50
153e8428d6fSNishanth Menon #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6
154e8428d6fSNishanth Menon #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	20
155e8428d6fSNishanth Menon #define CONFIG_ENV_EEPROM_IS_ON_I2C
156e8428d6fSNishanth Menon 
157e8428d6fSNishanth Menon /* NAND Configuration */
158e8428d6fSNishanth Menon #define CONFIG_KEYSTONE_RBL_NAND
159e8428d6fSNishanth Menon #define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE	CONFIG_ENV_OFFSET
160e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_MASK_CLE		0x4000
161e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_MASK_ALE		0x2000
162e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_CS			2
163e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_USE_FLASH_BBT
164e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
165e8428d6fSNishanth Menon 
166e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_LARGEPAGE
167e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_BASE_LIST		{ 0x30000000, }
168e8428d6fSNishanth Menon #define CONFIG_SYS_MAX_NAND_DEVICE		1
169e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_MAX_CHIPS		1
170e8428d6fSNishanth Menon #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
171e8428d6fSNishanth Menon 
172*7ff0528aSJean-Jacques Hiblot #define DFU_ALT_INFO_MMC \
173*7ff0528aSJean-Jacques Hiblot 	"dfu_alt_info_mmc=" \
174*7ff0528aSJean-Jacques Hiblot 	"MLO fat 0 1;" \
175*7ff0528aSJean-Jacques Hiblot 	"u-boot.img fat 0 1;" \
176*7ff0528aSJean-Jacques Hiblot 	"uEnv.txt fat 0 1\0"
177*7ff0528aSJean-Jacques Hiblot 
178*7ff0528aSJean-Jacques Hiblot /* DFU settings */
179*7ff0528aSJean-Jacques Hiblot #define DFUARGS \
180*7ff0528aSJean-Jacques Hiblot 	"dfu_bufsiz=0x10000\0" \
181*7ff0528aSJean-Jacques Hiblot 	DFU_ALT_INFO_MMC \
182*7ff0528aSJean-Jacques Hiblot 
183e8428d6fSNishanth Menon /* U-Boot general configuration */
184e8428d6fSNishanth Menon #define CONFIG_MX_CYCLIC
185e8428d6fSNishanth Menon #define CONFIG_TIMESTAMP
186e8428d6fSNishanth Menon 
187e8428d6fSNishanth Menon /* EDMA3 */
188e8428d6fSNishanth Menon #define CONFIG_TI_EDMA3
189e8428d6fSNishanth Menon 
1903f18ff07SVignesh R #define KERNEL_MTD_PARTS						\
1913f18ff07SVignesh R 	"mtdparts="							\
1923f18ff07SVignesh R 	SPI_MTD_PARTS
1933f18ff07SVignesh R 
194abca9477SMurali Karicheri #define DEFAULT_FW_INITRAMFS_BOOT_ENV					\
195abca9477SMurali Karicheri 	"name_fw_rd=k2-fw-initrd.cpio.gz\0"				\
196abca9477SMurali Karicheri 	"set_rd_spec=setenv rd_spec ${rdaddr}:${filesize}\0"		\
197abca9477SMurali Karicheri 	"init_fw_rd_net=dhcp ${rdaddr} ${tftp_root}/${name_fw_rd}; "	\
198abca9477SMurali Karicheri 		"run set_rd_spec\0"					\
199979a1f8bSAndrew F. Davis 	"init_fw_rd_nfs=nfs ${rdaddr} ${nfs_root}/boot/${name_fw_rd}; "	\
200979a1f8bSAndrew F. Davis 		"run set_rd_spec\0"					\
201abca9477SMurali Karicheri 	"init_fw_rd_ramfs=setenv rd_spec -\0"				\
202abca9477SMurali Karicheri 	"init_fw_rd_ubi=ubifsload ${rdaddr} ${bootdir}/${name_fw_rd}; "	\
203abca9477SMurali Karicheri 		"run set_rd_spec\0"					\
204abca9477SMurali Karicheri 
2056f6e9439SNishanth Menon #define DEFAULT_PMMC_BOOT_ENV						\
2066f6e9439SNishanth Menon 	"set_name_pmmc=setenv name_pmmc ti-sci-firmware-${soc_variant}.bin\0" \
2076f6e9439SNishanth Menon 	"dev_pmmc=0\0"							\
2086f6e9439SNishanth Menon 	"get_pmmc_net=dhcp ${loadaddr} ${tftp_root}/${name_pmmc}\0"	\
209979a1f8bSAndrew F. Davis 	"get_pmmc_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_pmmc}\0"	\
2106f6e9439SNishanth Menon 	"get_pmmc_ramfs=run get_pmmc_net\0"				\
2116f6e9439SNishanth Menon 	"get_pmmc_mmc=load mmc ${bootpart} ${loadaddr} "		\
2126f6e9439SNishanth Menon 			"${bootdir}/${name_pmmc}\0"			\
2136f6e9439SNishanth Menon 	"get_pmmc_ubi=ubifsload ${loadaddr} ${bootdir}/${name_pmmc}\0"	\
2146f6e9439SNishanth Menon 	"run_pmmc=rproc init; rproc list; "				\
2156f6e9439SNishanth Menon 		"rproc load ${dev_pmmc} ${loadaddr} 0x${filesize}; "	\
2166f6e9439SNishanth Menon 		"rproc start ${dev_pmmc}\0"				\
2176f6e9439SNishanth Menon 
218e8428d6fSNishanth Menon #define CONFIG_EXTRA_ENV_SETTINGS					\
219fd72d318SNishanth Menon 	DEFAULT_LINUX_BOOT_ENV						\
220e8428d6fSNishanth Menon 	CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS				\
221*7ff0528aSJean-Jacques Hiblot 	DFUARGS								\
22248dc1657SCarlos Hernandez 	"bootdir=/boot\0" \
223e8428d6fSNishanth Menon 	"tftp_root=/\0"							\
224e8428d6fSNishanth Menon 	"nfs_root=/export\0"						\
225e8428d6fSNishanth Menon 	"mem_lpae=1\0"							\
226e8428d6fSNishanth Menon 	"addr_ubi=0x82000000\0"						\
227e8428d6fSNishanth Menon 	"addr_secdb_key=0xc000000\0"					\
228bad773f4SNishanth Menon 	"name_kern=zImage\0"						\
229ceee15ceSLokesh Vutla 	"addr_mon=0x87000000\0"						\
23008d06310SMadan Srinivas 	"addr_non_sec_mon=0x0c087fc0\0"					\
23108d06310SMadan Srinivas 	"addr_load_sec_bm=0x0c08c000\0"					\
232e8428d6fSNishanth Menon 	"run_mon=mon_install ${addr_mon}\0"				\
23308d06310SMadan Srinivas 	"run_mon_hs=mon_install ${addr_non_sec_mon} "			\
23408d06310SMadan Srinivas 			"${addr_load_sec_bm}\0"				\
235abca9477SMurali Karicheri 	"run_kern=bootz ${loadaddr} ${rd_spec} ${fdtaddr}\0"		\
236e8428d6fSNishanth Menon 	"init_net=run args_all args_net\0"				\
237c29a3ce4SAndrew F. Davis 	"init_nfs=setenv autoload no; dhcp; run args_all args_net\0"	\
238e8428d6fSNishanth Menon 	"init_ubi=run args_all args_ubi; "				\
2398462cb57SCarlos Hernandez 		"ubi part ubifs; ubifsmount ubi:rootfs;\0"			\
240fd72d318SNishanth Menon 	"get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0"	\
241c29a3ce4SAndrew F. Davis 	"get_fdt_nfs=nfs ${fdtaddr} ${nfs_root}/boot/${name_fdt}\0"	\
24248dc1657SCarlos Hernandez 	"get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt}\0"		\
243fd72d318SNishanth Menon 	"get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0"	\
244c29a3ce4SAndrew F. Davis 	"get_kern_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_kern}\0"	\
24548dc1657SCarlos Hernandez 	"get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern}\0"		\
246e8428d6fSNishanth Menon 	"get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
247c29a3ce4SAndrew F. Davis 	"get_mon_nfs=nfs ${addr_mon} ${nfs_root}/boot/${name_mon}\0"	\
24848dc1657SCarlos Hernandez 	"get_mon_ubi=ubifsload ${addr_mon} ${bootdir}/${name_mon}\0"	\
249881261c8SAndrew F. Davis 	"get_fit_net=dhcp ${fit_loadaddr} ${tftp_root}"			\
250881261c8SAndrew F. Davis 						"/${fit_bootfile}\0"	\
251881261c8SAndrew F. Davis 	"get_fit_nfs=nfs ${fit_loadaddr} ${nfs_root}/boot/${fit_bootfile}\0"\
252881261c8SAndrew F. Davis 	"get_fit_ubi=ubifsload ${fit_loadaddr} ${bootdir}/${fit_bootfile}\0"\
253881261c8SAndrew F. Davis 	"get_fit_mmc=load mmc ${bootpart} ${fit_loadaddr} "		\
254881261c8SAndrew F. Davis 					"${bootdir}/${fit_bootfile}\0"	\
2558889e984SVitaly Andrianov 	"get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0"	\
256c29a3ce4SAndrew F. Davis 	"get_uboot_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_uboot}\0" \
257e8b9fdceSFaiz Abbas 	"burn_uboot_spi=sf probe; sf erase 0 0x100000; "		\
2588889e984SVitaly Andrianov 		"sf write ${loadaddr} 0 ${filesize}\0"		\
259e8428d6fSNishanth Menon 	"burn_uboot_nand=nand erase 0 0x100000; "			\
2608889e984SVitaly Andrianov 		"nand write ${loadaddr} 0 ${filesize}\0"		\
2613f18ff07SVignesh R 	"args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1 "	\
2623f18ff07SVignesh R 		KERNEL_MTD_PARTS					\
263e8428d6fSNishanth Menon 	"args_net=setenv bootargs ${bootargs} rootfstype=nfs "		\
264e8428d6fSNishanth Menon 		"root=/dev/nfs rw nfsroot=${serverip}:${nfs_root},"	\
265e8428d6fSNishanth Menon 		"${nfs_options} ip=dhcp\0"				\
266e8428d6fSNishanth Menon 	"nfs_options=v3,tcp,rsize=4096,wsize=4096\0"			\
267fd72d318SNishanth Menon 	"get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0"	\
268fd72d318SNishanth Menon 	"get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0"	\
269e8428d6fSNishanth Menon 	"get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
270881261c8SAndrew F. Davis 	"get_fit_ramfs=dhcp ${fit_loadaddr} ${tftp_root}"		\
271881261c8SAndrew F. Davis 						"/${fit_bootfile}\0"	\
272fd72d318SNishanth Menon 	"get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0"	\
273e8428d6fSNishanth Menon 	"get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0"	\
274c29a3ce4SAndrew F. Davis 	"get_ubi_nfs=nfs ${addr_ubi} ${nfs_root}/boot/${name_ubi}\0"	\
275e8428d6fSNishanth Menon 	"burn_ubi=nand erase.part ubifs; "				\
276e8428d6fSNishanth Menon 		"nand write ${addr_ubi} ubifs ${filesize}\0"		\
277e8428d6fSNishanth Menon 	"init_ramfs=run args_all args_ramfs get_fs_ramfs\0"		\
278e8428d6fSNishanth Menon 	"args_ramfs=setenv bootargs ${bootargs} "			\
279e8428d6fSNishanth Menon 		"rdinit=/sbin/init rw root=/dev/ram0 "			\
280f06b454bSVitaly Andrianov 		"initrd=0x808080000,80M\0"				\
281e8428d6fSNishanth Menon 	"no_post=1\0"							\
282e8428d6fSNishanth Menon 	"mtdparts=mtdparts=davinci_nand.0:"				\
283e8428d6fSNishanth Menon 		"1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"
284e8428d6fSNishanth Menon 
2856f6e9439SNishanth Menon #ifndef CONFIG_BOOTCOMMAND
28608d06310SMadan Srinivas #ifndef CONFIG_TI_SECURE_DEVICE
287e8428d6fSNishanth Menon #define CONFIG_BOOTCOMMAND						\
2883f5651a7SAndrew F. Davis 	"run init_${boot}; "						\
2893f5651a7SAndrew F. Davis 	"run get_mon_${boot} run_mon; "					\
2903f5651a7SAndrew F. Davis 	"run get_kern_${boot}; "					\
2913f5651a7SAndrew F. Davis 	"run init_fw_rd_${boot}; "					\
2923f5651a7SAndrew F. Davis 	"run get_fdt_${boot}; "						\
2933f5651a7SAndrew F. Davis 	"run run_kern"
29408d06310SMadan Srinivas #else
29508d06310SMadan Srinivas #define CONFIG_BOOTCOMMAND						\
2963f5651a7SAndrew F. Davis 	"run run_mon_hs; "						\
2973f5651a7SAndrew F. Davis 	"run init_${boot}; "						\
2983f5651a7SAndrew F. Davis 	"run get_fit_${boot}; "						\
2993f5651a7SAndrew F. Davis 	"bootm ${fit_loadaddr}#${name_fdt}"
30008d06310SMadan Srinivas #endif
3016f6e9439SNishanth Menon #endif
302e8428d6fSNishanth Menon 
303e07cff11SNishanth Menon /* Now for the remaining common defines */
304e07cff11SNishanth Menon #include <configs/ti_armv7_common.h>
305e07cff11SNishanth Menon 
306e8428d6fSNishanth Menon /* we may include files below only after all above definitions */
307e8428d6fSNishanth Menon #include <asm/arch/hardware.h>
308e8428d6fSNishanth Menon #include <asm/arch/clock.h>
309e6d71e1cSVitaly Andrianov #ifndef CONFIG_SOC_K2G
31043ebbfc3SMasahiro Yamada #define CONFIG_SYS_HZ_CLOCK		ks_clk_get_rate(KS2_CLK1_6)
311e6d71e1cSVitaly Andrianov #else
312ee3c6532SLokesh Vutla #define CONFIG_SYS_HZ_CLOCK		get_external_clk(sys_clk)
313e6d71e1cSVitaly Andrianov #endif
314e8428d6fSNishanth Menon 
315e8428d6fSNishanth Menon #endif /* __CONFIG_KS2_EVM_H */
316