183d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
287694558STom Rini /*
387694558STom Rini  * ti_armv7_common.h
487694558STom Rini  *
587694558STom Rini  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
687694558STom Rini  *
787694558STom Rini  * The various ARMv7 SoCs from TI all share a number of IP blocks when
887694558STom Rini  * implementing a given feature.  Rather than define these in every
987694558STom Rini  * board or even SoC common file, we define a common file to be re-used
1087694558STom Rini  * in all cases.  While technically true that some of these details are
1187694558STom Rini  * configurable at the board design, they are common throughout SoC
1287694558STom Rini  * reference platforms as well as custom designs and become de facto
1387694558STom Rini  * standards.
1487694558STom Rini  */
1587694558STom Rini 
1687694558STom Rini #ifndef __CONFIG_TI_ARMV7_COMMON_H__
1787694558STom Rini #define __CONFIG_TI_ARMV7_COMMON_H__
1887694558STom Rini 
1987694558STom Rini /* Support both device trees and ATAGs. */
2087694558STom Rini #define CONFIG_CMDLINE_TAG
2187694558STom Rini #define CONFIG_SETUP_MEMORY_TAGS
2287694558STom Rini #define CONFIG_INITRD_TAG
2387694558STom Rini 
2487694558STom Rini /*
2587694558STom Rini  * Our DDR memory always starts at 0x80000000 and U-Boot shall have
2687694558STom Rini  * relocated itself to higher in memory by the time this value is used.
27fb3ad9bdSTom Rini  * However, set this to a 32MB offset to allow for easier Linux kernel
28fb3ad9bdSTom Rini  * booting as the default is often used as the kernel load address.
2987694558STom Rini  */
30fb3ad9bdSTom Rini #define CONFIG_SYS_LOAD_ADDR		0x82000000
31fb3ad9bdSTom Rini 
32fb3ad9bdSTom Rini /*
33fb3ad9bdSTom Rini  * We setup defaults based on constraints from the Linux kernel, which should
34fb3ad9bdSTom Rini  * also be safe elsewhere.  We have the default load at 32MB into DDR (for
35fb3ad9bdSTom Rini  * the kernel), FDT above 128MB (the maximum location for the end of the
36fb3ad9bdSTom Rini  * kernel), and the ramdisk 512KB above that (allowing for hopefully never
37fb3ad9bdSTom Rini  * seen large trees).  We say all of this must be within the first 256MB
38fb3ad9bdSTom Rini  * as that will normally be within the kernel lowmem and thus visible via
39fb3ad9bdSTom Rini  * bootm_size and we only run on platforms with 256MB or more of memory.
40fb3ad9bdSTom Rini  */
41fb3ad9bdSTom Rini #define DEFAULT_LINUX_BOOT_ENV \
42fb3ad9bdSTom Rini 	"loadaddr=0x82000000\0" \
43fb3ad9bdSTom Rini 	"kernel_addr_r=0x82000000\0" \
44fb3ad9bdSTom Rini 	"fdtaddr=0x88000000\0" \
45fb3ad9bdSTom Rini 	"fdt_addr_r=0x88000000\0" \
46fb3ad9bdSTom Rini 	"rdaddr=0x88080000\0" \
47fb3ad9bdSTom Rini 	"ramdisk_addr_r=0x88080000\0" \
487749b67fSSjoerd Simons 	"scriptaddr=0x80000000\0" \
497749b67fSSjoerd Simons 	"pxefile_addr_r=0x80100000\0" \
502a777884SLokesh Vutla 	"bootm_size=0x10000000\0" \
512a777884SLokesh Vutla 	"boot_fdt=try\0"
5287694558STom Rini 
531e93cc84SLokesh Vutla #define DEFAULT_FIT_TI_ARGS \
541e93cc84SLokesh Vutla 	"boot_fit=0\0" \
55*1abddd93SAndrew F. Davis 	"fit_loadaddr=0x90000000\0" \
56f7c8f032SAndrew F. Davis 	"fit_bootfile=fitImage\0" \
571e93cc84SLokesh Vutla 	"update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile}\0" \
585bb7318fSAndrew F. Davis 	"loadfit=run args_mmc; bootm ${loadaddr}#${fdtfile};\0" \
591e93cc84SLokesh Vutla 
6087694558STom Rini /*
61c6a7fce1SEnric Balletbò i Serra  * DDR information.  If the CONFIG_NR_DRAM_BANKS is not defined,
62c6a7fce1SEnric Balletbò i Serra  * we say (for simplicity) that we have 1 bank, always, even when
63c6a7fce1SEnric Balletbò i Serra  * we have more.  We always start at 0x80000000, and we place the
64c6a7fce1SEnric Balletbò i Serra  * initial stack pointer in our SRAM. Otherwise, we can define
65c6a7fce1SEnric Balletbò i Serra  * CONFIG_NR_DRAM_BANKS before including this file.
6687694558STom Rini  */
6787694558STom Rini #define CONFIG_SYS_SDRAM_BASE		0x80000000
68e07cff11SNishanth Menon 
69e07cff11SNishanth Menon #ifndef CONFIG_SYS_INIT_SP_ADDR
7087694558STom Rini #define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
7187694558STom Rini 						GENERATED_GBL_DATA_SIZE)
72e07cff11SNishanth Menon #endif
7387694558STom Rini 
7487694558STom Rini /* Timer information. */
7587694558STom Rini #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
7687694558STom Rini 
771514244cSJean-Jacques Hiblot /* If DM_I2C, enable non-DM I2C support */
781514244cSJean-Jacques Hiblot #if !defined(CONFIG_DM_I2C)
7987694558STom Rini #define CONFIG_I2C
806789e84eSHeiko Schocher #define CONFIG_SYS_I2C
81c50f2610SMugunthan V N #endif
8287694558STom Rini 
8387694558STom Rini /*
8487694558STom Rini  * The following are general good-enough settings for U-Boot.  We set a
8587694558STom Rini  * large malloc pool as we generally have a lot of DDR, and we opt for
8687694558STom Rini  * function over binary size in the main portion of U-Boot as this is
8787694558STom Rini  * generally easily constrained later if needed.  We enable the config
8887694558STom Rini  * options that give us information in the environment about what board
8987694558STom Rini  * we are on so we do not need to rely on the command prompt.  We set a
9087694558STom Rini  * console baudrate of 115200 and use the default baud rate table.
9187694558STom Rini  */
925e61b0dfSTom Rini #define CONFIG_SYS_MALLOC_LEN		SZ_32M
931dd44e5aSTom Rini #define CONFIG_ENV_OVERWRITE		/* Overwrite ethaddr / serial# */
941dd44e5aSTom Rini 
951dd44e5aSTom Rini /* As stated above, the following choices are optional. */
9687694558STom Rini 
9787694558STom Rini /* We set the max number of command args high to avoid HUSH bugs. */
9887694558STom Rini #define CONFIG_SYS_MAXARGS		64
9987694558STom Rini 
10087694558STom Rini /* Console I/O Buffer Size */
101b9daed8aSLokesh Vutla #define CONFIG_SYS_CBSIZE		1024
10287694558STom Rini /* Boot Argument Buffer Size */
10387694558STom Rini #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
10487694558STom Rini 
10587694558STom Rini /*
10687694558STom Rini  * When we have SPI, NOR or NAND flash we expect to be making use of
10787694558STom Rini  * mtdparts, both for ease of use in U-Boot and for passing information
10887694558STom Rini  * on to the Linux kernel.
10987694558STom Rini  */
11087694558STom Rini 
11187694558STom Rini /*
11287694558STom Rini  * Our platforms make use of SPL to initalize the hardware (primarily
113e95b9b44SAndrew F. Davis  * memory) enough for full U-Boot to be loaded. We make use of the general
114e95b9b44SAndrew F. Davis  * SPL framework found under common/spl/.  Given our generally common memory
115e95b9b44SAndrew F. Davis  * map, we set a number of related defaults and sizes here.
11687694558STom Rini  */
1177a5f71bcSSourav Poddar #if !defined(CONFIG_NOR_BOOT) && \
1187a5f71bcSSourav Poddar 	!(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX))
119e95b9b44SAndrew F. Davis 
120e95b9b44SAndrew F. Davis /*
121e95b9b44SAndrew F. Davis  * We also support Falcon Mode so that the Linux kernel can be booted
122e95b9b44SAndrew F. Davis  * directly from SPL. This is not currently available on HS devices.
123e95b9b44SAndrew F. Davis  */
12487694558STom Rini 
12587694558STom Rini /*
126865813edSTom Rini  * Place the image at the start of the ROM defined image space (per
127865813edSTom Rini  * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined
128fa2f81b0STom Rini  * downloaded image area minus 1KiB for scratch space.  We initalize DRAM as
129fa2f81b0STom Rini  * soon as we can so that we can place stack, malloc and BSS there.  We load
130fa2f81b0STom Rini  * U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict
131fa2f81b0STom Rini  * with older SPLs).  We have our BSS be placed 2MiB after this, to allow for
132fa2f81b0STom Rini  * the default Linux kernel address of 0x80008000 to work with most sized
133fa2f81b0STom Rini  * kernels, in the Falcon Mode case.  We have the SPL malloc pool at the end
134fa2f81b0STom Rini  * of the BSS area.  We suggest that the stack be placed at 32MiB after the
135fa2f81b0STom Rini  * start of DRAM to allow room for all of the above (handled in Kconfig).
13687694558STom Rini  */
137df4dbb5dSTom Rini #ifndef CONFIG_SPL_BSS_START_ADDR
13887694558STom Rini #define CONFIG_SPL_BSS_START_ADDR	0x80a00000
13987694558STom Rini #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
140df4dbb5dSTom Rini #endif
141df4dbb5dSTom Rini #ifndef CONFIG_SYS_SPL_MALLOC_START
14287694558STom Rini #define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
14387694558STom Rini 					 CONFIG_SPL_BSS_MAX_SIZE)
1445e61b0dfSTom Rini #define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_8M
145df4dbb5dSTom Rini #endif
146fa2f81b0STom Rini #ifndef CONFIG_SPL_MAX_SIZE
147fa2f81b0STom Rini #define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - \
148fa2f81b0STom Rini 					 CONFIG_SPL_TEXT_BASE)
149fa2f81b0STom Rini #endif
150fa2f81b0STom Rini 
15187694558STom Rini 
15287694558STom Rini /* FAT sd card locations. */
153e2ccdf89SPaul Kocialkowski #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
1549dba883aSLokesh Vutla #ifndef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
155205b4f33SGuillaume GARDET #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
1569dba883aSLokesh Vutla #endif
15787694558STom Rini 
15887694558STom Rini #ifdef CONFIG_SPL_OS_BOOT
15987694558STom Rini /* FAT */
160205b4f33SGuillaume GARDET #define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"
161205b4f33SGuillaume GARDET #define CONFIG_SPL_FS_LOAD_ARGS_NAME		"args"
16287694558STom Rini 
16387694558STom Rini /* RAW SD card / eMMC */
1647a53a1a8SJean-Jacques Hiblot #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x1700  /* address 0x2E0000 */
1657a53a1a8SJean-Jacques Hiblot #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x1500  /* address 0x2A0000 */
1667a53a1a8SJean-Jacques Hiblot #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0x200   /* 256KiB */
16787694558STom Rini #endif
16887694558STom Rini 
169a7142dd0STom Rini /* General parts of the framework, required. */
17087694558STom Rini 
17187694558STom Rini #ifdef CONFIG_NAND
17287694558STom Rini #define CONFIG_SPL_NAND_BASE
17387694558STom Rini #define CONFIG_SPL_NAND_DRIVERS
17487694558STom Rini #define CONFIG_SPL_NAND_ECC
17587694558STom Rini #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
17687694558STom Rini #endif
17787694558STom Rini #endif /* !CONFIG_NOR_BOOT */
17887694558STom Rini 
1792320866bSCooper Jr., Franklin /* Generic Environment Variables */
1802320866bSCooper Jr., Franklin 
1812320866bSCooper Jr., Franklin #ifdef CONFIG_CMD_NET
1822320866bSCooper Jr., Franklin #define NETARGS \
1832320866bSCooper Jr., Franklin 	"static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
1842320866bSCooper Jr., Franklin 		"::off\0" \
1852320866bSCooper Jr., Franklin 	"nfsopts=nolock\0" \
1862320866bSCooper Jr., Franklin 	"rootpath=/export/rootfs\0" \
1872320866bSCooper Jr., Franklin 	"netloadimage=tftp ${loadaddr} ${bootfile}\0" \
1882320866bSCooper Jr., Franklin 	"netloadfdt=tftp ${fdtaddr} ${fdtfile}\0" \
1892320866bSCooper Jr., Franklin 	"netargs=setenv bootargs console=${console} " \
1902320866bSCooper Jr., Franklin 		"${optargs} " \
1912320866bSCooper Jr., Franklin 		"root=/dev/nfs " \
1922320866bSCooper Jr., Franklin 		"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
1932320866bSCooper Jr., Franklin 		"ip=dhcp\0" \
1942320866bSCooper Jr., Franklin 	"netboot=echo Booting from network ...; " \
1952320866bSCooper Jr., Franklin 		"setenv autoload no; " \
1962320866bSCooper Jr., Franklin 		"dhcp; " \
1972320866bSCooper Jr., Franklin 		"run netloadimage; " \
1982320866bSCooper Jr., Franklin 		"run netloadfdt; " \
1992320866bSCooper Jr., Franklin 		"run netargs; " \
2002320866bSCooper Jr., Franklin 		"bootz ${loadaddr} - ${fdtaddr}\0"
20160480f81SCooper Jr., Franklin #else
20260480f81SCooper Jr., Franklin #define NETARGS ""
2032320866bSCooper Jr., Franklin #endif
2042320866bSCooper Jr., Franklin 
20587694558STom Rini #endif	/* __CONFIG_TI_ARMV7_COMMON_H__ */
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