1 /* 2 * ti816x_evm.h 3 * 4 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 5 * Antoine Tenart, <atenart@adeneo-embedded.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_TI816X_EVM_H 11 #define __CONFIG_TI816X_EVM_H 12 13 #define CONFIG_SYS_CACHELINE_SIZE 64 14 15 #define CONFIG_TI81XX 16 #define CONFIG_TI816X 17 #define CONFIG_SYS_NO_FLASH 18 #define CONFIG_OMAP 19 #define CONFIG_OMAP_COMMON 20 21 #define CONFIG_ARCH_CPU_INIT 22 23 #include <asm/arch/omap.h> 24 25 #define CONFIG_ENV_SIZE 0x2000 26 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (32 * 1024)) 27 #define CONFIG_SYS_LONGHELP /* undef save memory */ 28 #define CONFIG_MACH_TYPE MACH_TYPE_TI8168EVM 29 30 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 31 #define CONFIG_SETUP_MEMORY_TAGS 32 #define CONFIG_INITRD_TAG /* required for ramdisk support */ 33 34 #define CONFIG_VERSION_VARIABLE 35 #define CONFIG_DISPLAY_CPUINFO 36 37 #define CONFIG_BOOTDELAY 3 /* set negative for no autoboot */ 38 #define CONFIG_EXTRA_ENV_SETTINGS \ 39 "loadaddr=0x81000000\0" \ 40 41 #define CONFIG_BOOTCOMMAND \ 42 "mmc rescan;" \ 43 "fatload mmc 0 ${loadaddr} uImage;" \ 44 "bootm ${loadaddr}" \ 45 46 #define CONFIG_BOOTARGS "console=ttyO2,115200n8 noinitrd earlyprintk" 47 48 /* Clock Defines */ 49 #define V_OSCK 24000000 /* Clock output from T2 */ 50 #define V_SCLK (V_OSCK >> 1) 51 52 #define CONFIG_SYS_MAXARGS 32 53 #define CONFIG_SYS_CBSIZE 512 /* console I/O buffer size */ 54 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 55 + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ 56 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* boot arg buffer size */ 57 58 #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ 59 60 #define CONFIG_CMD_ASKEN 61 #define CONFIG_OMAP_GPIO 62 #define CONFIG_MMC 63 #define CONFIG_GENERIC_MMC 64 #define CONFIG_OMAP_HSMMC 65 #define CONFIG_DOS_PARTITION 66 67 #define CONFIG_FS_FAT 68 69 /* 70 * Only one of the following two options (DDR3/DDR2) should be enabled 71 * CONFIG_TI816X_EVM_DDR2 72 * CONFIG_TI816X_EVM_DDR3 73 */ 74 #define CONFIG_TI816X_EVM_DDR3 75 76 /* 77 * Supported values: 400, 531, 675 or 796 MHz 78 */ 79 #define CONFIG_TI816X_DDR_PLL_796 80 81 #define CONFIG_TI816X_USE_EMIF0 1 82 #define CONFIG_TI816X_USE_EMIF1 1 83 84 #define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */ 85 #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ 86 #define PHYS_DRAM_1_SIZE 0x40000000 /* 1 GB */ 87 #define PHYS_DRAM_2 0xC0000000 /* DRAM Bank #2 */ 88 #define PHYS_DRAM_2_SIZE 0x40000000 /* 1 GB */ 89 90 #define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2048MB */ 91 #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 92 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ 93 GENERATED_GBL_DATA_SIZE) 94 95 /** 96 * Platform/Board specific defs 97 */ 98 #define CONFIG_SYS_CLK_FREQ 27000000 99 #define CONFIG_SYS_TIMERBASE 0x4802E000 100 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 101 102 #undef CONFIG_NAND_OMAP_GPMC 103 104 /* 105 * NS16550 Configuration 106 */ 107 #define CONFIG_SYS_NS16550_SERIAL 108 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 109 #define CONFIG_SYS_NS16550_CLK (48000000) 110 #define CONFIG_SYS_NS16550_COM1 0x48024000 /* Base EVM has UART2 */ 111 112 #define CONFIG_BAUDRATE 115200 113 114 /* allow overwriting serial config and ethaddr */ 115 #define CONFIG_ENV_OVERWRITE 116 117 #define CONFIG_SERIAL1 118 #define CONFIG_SERIAL2 119 #define CONFIG_SERIAL3 120 #define CONFIG_CONS_INDEX 1 121 #define CONFIG_SYS_CONSOLE_INFO_QUIET 122 123 #define CONFIG_ENV_IS_NOWHERE 124 125 /* SPL */ 126 /* Defines for SPL */ 127 #define CONFIG_SPL_FRAMEWORK 128 #define CONFIG_SPL_TEXT_BASE 0x40400000 129 #define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024) 130 131 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 132 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 133 134 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 135 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 136 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 137 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 138 #define CONFIG_SPL_MMC_SUPPORT 139 #define CONFIG_SPL_FAT_SUPPORT 140 141 #define CONFIG_SPL_LIBCOMMON_SUPPORT 142 #define CONFIG_SPL_LIBDISK_SUPPORT 143 #define CONFIG_SPL_LIBGENERIC_SUPPORT 144 #define CONFIG_SPL_SERIAL_SUPPORT 145 #define CONFIG_SPL_GPIO_SUPPORT 146 #define CONFIG_SPL_YMODEM_SUPPORT 147 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 148 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 149 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 150 151 #define CONFIG_SPL_BOARD_INIT 152 153 #define CONFIG_SYS_TEXT_BASE 0x80800000 154 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 155 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 156 157 /* Since SPL did pll and ddr initialization for us, 158 * we don't need to do it twice. 159 */ 160 #ifndef CONFIG_SPL_BUILD 161 #define CONFIG_SKIP_LOWLEVEL_INIT 162 #endif 163 164 /* Unsupported features */ 165 #undef CONFIG_USE_IRQ 166 167 #endif 168