xref: /openbmc/u-boot/include/configs/ti816x_evm.h (revision ba10b852)
1 /*
2  * ti816x_evm.h
3  *
4  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
5  * Antoine Tenart, <atenart@adeneo-embedded.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_TI816X_EVM_H
11 #define __CONFIG_TI816X_EVM_H
12 
13 #define CONFIG_SYS_CACHELINE_SIZE	64
14 
15 #define CONFIG_TI81XX
16 #define CONFIG_TI816X
17 #define CONFIG_SYS_NO_FLASH
18 #define CONFIG_OMAP
19 #define CONFIG_OMAP_COMMON
20 
21 #define CONFIG_ARCH_CPU_INIT
22 
23 #include <asm/arch/omap.h>
24 
25 #define CONFIG_ENV_SIZE			0x2000
26 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (32 * 1024))
27 #define CONFIG_SYS_LONGHELP		/* undef save memory */
28 #define CONFIG_SYS_HUSH_PARSER
29 #define CONFIG_MACH_TYPE		MACH_TYPE_TI8168EVM
30 
31 #define CONFIG_OF_LIBFDT
32 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
33 #define CONFIG_SETUP_MEMORY_TAGS
34 #define CONFIG_INITRD_TAG		/* required for ramdisk support */
35 
36 #define CONFIG_VERSION_VARIABLE
37 #define CONFIG_DISPLAY_CPUINFO
38 
39 #define CONFIG_BOOTDELAY		3 /* set negative for no autoboot */
40 #define CONFIG_EXTRA_ENV_SETTINGS	\
41 	"loadaddr=0x81000000\0"		\
42 
43 #define CONFIG_BOOTCOMMAND			\
44 	"mmc rescan;"				\
45 	"fatload mmc 0 ${loadaddr} uImage;"	\
46 	"bootm ${loadaddr}"			\
47 
48 #define CONFIG_BOOTARGS	"console=ttyO2,115200n8 noinitrd earlyprintk"
49 
50 /* Clock Defines */
51 #define V_OSCK          24000000    /* Clock output from T2 */
52 #define V_SCLK          (V_OSCK >> 1)
53 
54 #define CONFIG_SYS_MAXARGS	32
55 #define CONFIG_SYS_CBSIZE	512 /* console I/O buffer size */
56 #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE \
57 		+ sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
58 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE /* boot arg buffer size */
59 
60 #define CONFIG_SYS_LOAD_ADDR		0x81000000 /* Default load address */
61 
62 #define CONFIG_CMD_ASKEN
63 #define CONFIG_OMAP_GPIO
64 #define CONFIG_MMC
65 #define CONFIG_GENERIC_MMC
66 #define CONFIG_OMAP_HSMMC
67 #define CONFIG_CMD_MMC
68 #define CONFIG_DOS_PARTITION
69 #define CONFIG_CMD_FAT
70 #define CONFIG_CMD_EXT2
71 
72 #define CONFIG_FS_FAT
73 
74 /*
75  * Only one of the following two options (DDR3/DDR2) should be enabled
76  * CONFIG_TI816X_EVM_DDR2
77  * CONFIG_TI816X_EVM_DDR3
78  */
79 #define CONFIG_TI816X_EVM_DDR3
80 
81 /*
82  * Supported values: 400, 531, 675 or 796 MHz
83  */
84 #define CONFIG_TI816X_DDR_PLL_796
85 
86 #define CONFIG_TI816X_USE_EMIF0	1
87 #define CONFIG_TI816X_USE_EMIF1	1
88 
89 
90 #define CONFIG_NR_DRAM_BANKS	2		/* we have 2 banks of DRAM */
91 #define PHYS_DRAM_1		0x80000000	/* DRAM Bank #1 */
92 #define PHYS_DRAM_1_SIZE        0x40000000	/* 1 GB */
93 #define PHYS_DRAM_2		0xC0000000	/* DRAM Bank #2 */
94 #define PHYS_DRAM_2_SIZE	0x40000000	/* 1 GB */
95 
96 #define CONFIG_MAX_RAM_BANK_SIZE	(2048 << 20)	/* 2048MB */
97 #define CONFIG_SYS_SDRAM_BASE		PHYS_DRAM_1
98 #define CONFIG_SYS_INIT_SP_ADDR		(NON_SECURE_SRAM_END - \
99 		GENERATED_GBL_DATA_SIZE)
100 
101 /**
102  * Platform/Board specific defs
103  */
104 #define CONFIG_SYS_CLK_FREQ     27000000
105 #define CONFIG_SYS_TIMERBASE    0x4802E000
106 #define CONFIG_SYS_PTV          2   /* Divisor: 2^(PTV+1) => 8 */
107 
108 #undef CONFIG_NAND_OMAP_GPMC
109 
110 /*
111  * NS16550 Configuration
112  */
113 #define CONFIG_SYS_NS16550_SERIAL
114 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
115 #define CONFIG_SYS_NS16550_CLK      (48000000)
116 #define CONFIG_SYS_NS16550_COM1     0x48024000  /* Base EVM has UART2 */
117 
118 #define CONFIG_BAUDRATE     115200
119 
120 /* allow overwriting serial config and ethaddr */
121 #define CONFIG_ENV_OVERWRITE
122 
123 #define CONFIG_SERIAL1
124 #define CONFIG_SERIAL2
125 #define CONFIG_SERIAL3
126 #define CONFIG_CONS_INDEX	1
127 #define CONFIG_SYS_CONSOLE_INFO_QUIET
128 
129 #define CONFIG_ENV_IS_NOWHERE
130 
131 /* SPL */
132 /* Defines for SPL */
133 #define CONFIG_SPL_FRAMEWORK
134 #define CONFIG_SPL_TEXT_BASE    0x40400000
135 #define CONFIG_SPL_MAX_SIZE     ((128 - 18) * 1024)
136 
137 #define CONFIG_SPL_BSS_START_ADDR   0x80000000
138 #define CONFIG_SPL_BSS_MAX_SIZE     0x80000     /* 512 KB */
139 
140 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
141 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
142 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
143 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME        "u-boot.img"
144 #define CONFIG_SPL_MMC_SUPPORT
145 #define CONFIG_SPL_FAT_SUPPORT
146 
147 #define CONFIG_SPL_LIBCOMMON_SUPPORT
148 #define CONFIG_SPL_LIBDISK_SUPPORT
149 #define CONFIG_SPL_LIBGENERIC_SUPPORT
150 #define CONFIG_SPL_SERIAL_SUPPORT
151 #define CONFIG_SPL_GPIO_SUPPORT
152 #define CONFIG_SPL_YMODEM_SUPPORT
153 #define CONFIG_SYS_SPI_U_BOOT_OFFS  0x20000
154 #define CONFIG_SYS_SPI_U_BOOT_SIZE  0x40000
155 #define CONFIG_SPL_LDSCRIPT     "$(CPUDIR)/omap-common/u-boot-spl.lds"
156 
157 #define CONFIG_SPL_BOARD_INIT
158 
159 #define CONFIG_SYS_TEXT_BASE        0x80800000
160 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
161 #define CONFIG_SYS_SPL_MALLOC_SIZE  0x100000
162 
163 /* Since SPL did pll and ddr initialization for us,
164  * we don't need to do it twice.
165  */
166 #ifndef CONFIG_SPL_BUILD
167 #define CONFIG_SKIP_LOWLEVEL_INIT
168 #endif
169 
170 /* Unsupported features */
171 #undef CONFIG_USE_IRQ
172 
173 #endif
174