xref: /openbmc/u-boot/include/configs/ti816x_evm.h (revision 8b7d51249eca113c4965a7c417f33d7eb569434b)
1 /*
2  * ti816x_evm.h
3  *
4  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
5  * Antoine Tenart, <atenart@adeneo-embedded.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_TI816X_EVM_H
11 #define __CONFIG_TI816X_EVM_H
12 
13 #define CONFIG_TI81XX
14 #define CONFIG_TI816X
15 #define CONFIG_SYS_NO_FLASH
16 #define CONFIG_OMAP
17 #define CONFIG_OMAP_COMMON
18 
19 #define CONFIG_ARCH_CPU_INIT
20 
21 #include <asm/arch/omap.h>
22 
23 #define CONFIG_ENV_SIZE			0x2000
24 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (32 * 1024))
25 #define CONFIG_SYS_LONGHELP		/* undef save memory */
26 #define CONFIG_MACH_TYPE		MACH_TYPE_TI8168EVM
27 
28 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
29 #define CONFIG_SETUP_MEMORY_TAGS
30 #define CONFIG_INITRD_TAG		/* required for ramdisk support */
31 
32 #define CONFIG_VERSION_VARIABLE
33 #define CONFIG_DISPLAY_CPUINFO
34 
35 #define CONFIG_EXTRA_ENV_SETTINGS	\
36 	"loadaddr=0x81000000\0"		\
37 
38 #define CONFIG_BOOTCOMMAND			\
39 	"mmc rescan;"				\
40 	"fatload mmc 0 ${loadaddr} uImage;"	\
41 	"bootm ${loadaddr}"			\
42 
43 #define CONFIG_BOOTARGS	"console=ttyO2,115200n8 noinitrd earlyprintk"
44 
45 /* Clock Defines */
46 #define V_OSCK          24000000    /* Clock output from T2 */
47 #define V_SCLK          (V_OSCK >> 1)
48 
49 #define CONFIG_SYS_MAXARGS	32
50 #define CONFIG_SYS_CBSIZE	512 /* console I/O buffer size */
51 #define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE \
52 		+ sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
53 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE /* boot arg buffer size */
54 
55 #define CONFIG_SYS_LOAD_ADDR		0x81000000 /* Default load address */
56 
57 #define CONFIG_CMD_ASKEN
58 #define CONFIG_OMAP_GPIO
59 #define CONFIG_MMC
60 #define CONFIG_GENERIC_MMC
61 #define CONFIG_OMAP_HSMMC
62 #define CONFIG_DOS_PARTITION
63 
64 #define CONFIG_FS_FAT
65 
66 /*
67  * Only one of the following two options (DDR3/DDR2) should be enabled
68  * CONFIG_TI816X_EVM_DDR2
69  * CONFIG_TI816X_EVM_DDR3
70  */
71 #define CONFIG_TI816X_EVM_DDR3
72 
73 /*
74  * Supported values: 400, 531, 675 or 796 MHz
75  */
76 #define CONFIG_TI816X_DDR_PLL_796
77 
78 #define CONFIG_TI816X_USE_EMIF0	1
79 #define CONFIG_TI816X_USE_EMIF1	1
80 
81 #define CONFIG_NR_DRAM_BANKS	2		/* we have 2 banks of DRAM */
82 #define PHYS_DRAM_1		0x80000000	/* DRAM Bank #1 */
83 #define PHYS_DRAM_1_SIZE        0x40000000	/* 1 GB */
84 #define PHYS_DRAM_2		0xC0000000	/* DRAM Bank #2 */
85 #define PHYS_DRAM_2_SIZE	0x40000000	/* 1 GB */
86 
87 #define CONFIG_MAX_RAM_BANK_SIZE	(2048 << 20)	/* 2048MB */
88 #define CONFIG_SYS_SDRAM_BASE		PHYS_DRAM_1
89 #define CONFIG_SYS_INIT_SP_ADDR		(NON_SECURE_SRAM_END - \
90 		GENERATED_GBL_DATA_SIZE)
91 
92 /**
93  * Platform/Board specific defs
94  */
95 #define CONFIG_SYS_CLK_FREQ     27000000
96 #define CONFIG_SYS_TIMERBASE    0x4802E000
97 #define CONFIG_SYS_PTV          2   /* Divisor: 2^(PTV+1) => 8 */
98 
99 #undef CONFIG_NAND_OMAP_GPMC
100 
101 /*
102  * NS16550 Configuration
103  */
104 #define CONFIG_SYS_NS16550_SERIAL
105 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
106 #define CONFIG_SYS_NS16550_CLK      (48000000)
107 #define CONFIG_SYS_NS16550_COM1     0x48024000  /* Base EVM has UART2 */
108 
109 #define CONFIG_BAUDRATE     115200
110 
111 /* allow overwriting serial config and ethaddr */
112 #define CONFIG_ENV_OVERWRITE
113 
114 #define CONFIG_SERIAL1
115 #define CONFIG_SERIAL2
116 #define CONFIG_SERIAL3
117 #define CONFIG_CONS_INDEX	1
118 #define CONFIG_SYS_CONSOLE_INFO_QUIET
119 
120 #define CONFIG_ENV_IS_NOWHERE
121 
122 /* SPL */
123 /* Defines for SPL */
124 #define CONFIG_SPL_FRAMEWORK
125 #define CONFIG_SPL_TEXT_BASE    0x40400000
126 #define CONFIG_SPL_MAX_SIZE     ((128 - 18) * 1024)
127 
128 #define CONFIG_SPL_BSS_START_ADDR   0x80000000
129 #define CONFIG_SPL_BSS_MAX_SIZE     0x80000     /* 512 KB */
130 
131 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
132 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
133 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
134 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME        "u-boot.img"
135 #define CONFIG_SPL_MMC_SUPPORT
136 #define CONFIG_SPL_FAT_SUPPORT
137 
138 #define CONFIG_SPL_LIBCOMMON_SUPPORT
139 #define CONFIG_SPL_LIBDISK_SUPPORT
140 #define CONFIG_SPL_LIBGENERIC_SUPPORT
141 #define CONFIG_SPL_SERIAL_SUPPORT
142 #define CONFIG_SPL_GPIO_SUPPORT
143 #define CONFIG_SPL_YMODEM_SUPPORT
144 #define CONFIG_SYS_SPI_U_BOOT_OFFS  0x20000
145 #define CONFIG_SYS_SPI_U_BOOT_SIZE  0x40000
146 #define CONFIG_SPL_LDSCRIPT     "$(CPUDIR)/omap-common/u-boot-spl.lds"
147 
148 #define CONFIG_SPL_BOARD_INIT
149 
150 #define CONFIG_SYS_TEXT_BASE        0x80800000
151 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
152 #define CONFIG_SYS_SPL_MALLOC_SIZE  0x100000
153 
154 /* Since SPL did pll and ddr initialization for us,
155  * we don't need to do it twice.
156  */
157 #ifndef CONFIG_SPL_BUILD
158 #define CONFIG_SKIP_LOWLEVEL_INIT
159 #endif
160 
161 /* Unsupported features */
162 #undef CONFIG_USE_IRQ
163 
164 #endif
165