1 /* 2 * ti816x_evm.h 3 * 4 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 5 * Antoine Tenart, <atenart@adeneo-embedded.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_TI816X_EVM_H 11 #define __CONFIG_TI816X_EVM_H 12 13 #define CONFIG_SYS_CACHELINE_SIZE 64 14 15 #define CONFIG_TI81XX 16 #define CONFIG_TI816X 17 #define CONFIG_SYS_NO_FLASH 18 #define CONFIG_OMAP 19 #define CONFIG_OMAP_COMMON 20 21 #define CONFIG_ARCH_CPU_INIT 22 23 #include <asm/arch/omap.h> 24 25 #define CONFIG_ENV_SIZE 0x2000 26 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (32 * 1024)) 27 #define CONFIG_SYS_LONGHELP /* undef save memory */ 28 #define CONFIG_MACH_TYPE MACH_TYPE_TI8168EVM 29 30 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 31 #define CONFIG_SETUP_MEMORY_TAGS 32 #define CONFIG_INITRD_TAG /* required for ramdisk support */ 33 34 #define CONFIG_VERSION_VARIABLE 35 #define CONFIG_DISPLAY_CPUINFO 36 37 #define CONFIG_EXTRA_ENV_SETTINGS \ 38 "loadaddr=0x81000000\0" \ 39 40 #define CONFIG_BOOTCOMMAND \ 41 "mmc rescan;" \ 42 "fatload mmc 0 ${loadaddr} uImage;" \ 43 "bootm ${loadaddr}" \ 44 45 #define CONFIG_BOOTARGS "console=ttyO2,115200n8 noinitrd earlyprintk" 46 47 /* Clock Defines */ 48 #define V_OSCK 24000000 /* Clock output from T2 */ 49 #define V_SCLK (V_OSCK >> 1) 50 51 #define CONFIG_SYS_MAXARGS 32 52 #define CONFIG_SYS_CBSIZE 512 /* console I/O buffer size */ 53 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 54 + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ 55 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* boot arg buffer size */ 56 57 #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ 58 59 #define CONFIG_CMD_ASKEN 60 #define CONFIG_OMAP_GPIO 61 #define CONFIG_MMC 62 #define CONFIG_GENERIC_MMC 63 #define CONFIG_OMAP_HSMMC 64 #define CONFIG_DOS_PARTITION 65 66 #define CONFIG_FS_FAT 67 68 /* 69 * Only one of the following two options (DDR3/DDR2) should be enabled 70 * CONFIG_TI816X_EVM_DDR2 71 * CONFIG_TI816X_EVM_DDR3 72 */ 73 #define CONFIG_TI816X_EVM_DDR3 74 75 /* 76 * Supported values: 400, 531, 675 or 796 MHz 77 */ 78 #define CONFIG_TI816X_DDR_PLL_796 79 80 #define CONFIG_TI816X_USE_EMIF0 1 81 #define CONFIG_TI816X_USE_EMIF1 1 82 83 #define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */ 84 #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ 85 #define PHYS_DRAM_1_SIZE 0x40000000 /* 1 GB */ 86 #define PHYS_DRAM_2 0xC0000000 /* DRAM Bank #2 */ 87 #define PHYS_DRAM_2_SIZE 0x40000000 /* 1 GB */ 88 89 #define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2048MB */ 90 #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 91 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ 92 GENERATED_GBL_DATA_SIZE) 93 94 /** 95 * Platform/Board specific defs 96 */ 97 #define CONFIG_SYS_CLK_FREQ 27000000 98 #define CONFIG_SYS_TIMERBASE 0x4802E000 99 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 100 101 #undef CONFIG_NAND_OMAP_GPMC 102 103 /* 104 * NS16550 Configuration 105 */ 106 #define CONFIG_SYS_NS16550_SERIAL 107 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 108 #define CONFIG_SYS_NS16550_CLK (48000000) 109 #define CONFIG_SYS_NS16550_COM1 0x48024000 /* Base EVM has UART2 */ 110 111 #define CONFIG_BAUDRATE 115200 112 113 /* allow overwriting serial config and ethaddr */ 114 #define CONFIG_ENV_OVERWRITE 115 116 #define CONFIG_SERIAL1 117 #define CONFIG_SERIAL2 118 #define CONFIG_SERIAL3 119 #define CONFIG_CONS_INDEX 1 120 #define CONFIG_SYS_CONSOLE_INFO_QUIET 121 122 #define CONFIG_ENV_IS_NOWHERE 123 124 /* SPL */ 125 /* Defines for SPL */ 126 #define CONFIG_SPL_FRAMEWORK 127 #define CONFIG_SPL_TEXT_BASE 0x40400000 128 #define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024) 129 130 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 131 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 132 133 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 134 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 135 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 136 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 137 #define CONFIG_SPL_MMC_SUPPORT 138 #define CONFIG_SPL_FAT_SUPPORT 139 140 #define CONFIG_SPL_LIBCOMMON_SUPPORT 141 #define CONFIG_SPL_LIBDISK_SUPPORT 142 #define CONFIG_SPL_LIBGENERIC_SUPPORT 143 #define CONFIG_SPL_SERIAL_SUPPORT 144 #define CONFIG_SPL_GPIO_SUPPORT 145 #define CONFIG_SPL_YMODEM_SUPPORT 146 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 147 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 148 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 149 150 #define CONFIG_SPL_BOARD_INIT 151 152 #define CONFIG_SYS_TEXT_BASE 0x80800000 153 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 154 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 155 156 /* Since SPL did pll and ddr initialization for us, 157 * we don't need to do it twice. 158 */ 159 #ifndef CONFIG_SPL_BUILD 160 #define CONFIG_SKIP_LOWLEVEL_INIT 161 #endif 162 163 /* Unsupported features */ 164 #undef CONFIG_USE_IRQ 165 166 #endif 167