1 /** 2 * (C) Copyright 2014, Cavium Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 **/ 6 7 #ifndef __THUNDERX_88XX_H__ 8 #define __THUNDERX_88XX_H__ 9 10 #define CONFIG_REMAKE_ELF 11 12 #define CONFIG_THUNDERX 13 14 #define CONFIG_SYS_64BIT 15 16 #define MEM_BASE 0x00500000 17 18 #define CONFIG_SYS_LOWMEM_BASE MEM_BASE 19 20 /* Link Definitions */ 21 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 22 23 /* SMP Spin Table Definitions */ 24 #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 25 26 /* Generic Timer Definitions */ 27 #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ 28 29 #define CONFIG_SYS_MEMTEST_START MEM_BASE 30 #define CONFIG_SYS_MEMTEST_END (MEM_BASE + PHYS_SDRAM_1_SIZE) 31 32 /* Size of malloc() pool */ 33 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 34 35 /* PL011 Serial Configuration */ 36 37 #define CONFIG_PL011_CLOCK 24000000 38 #define CONFIG_CONS_INDEX 1 39 40 /* Generic Interrupt Controller Definitions */ 41 #define GICD_BASE (0x801000000000) 42 #define GICR_BASE (0x801000002000) 43 #define CONFIG_SYS_SERIAL0 0x87e024000000 44 #define CONFIG_SYS_SERIAL1 0x87e025000000 45 46 /* BOOTP options */ 47 #define CONFIG_BOOTP_BOOTFILESIZE 48 49 /* Miscellaneous configurable options */ 50 #define CONFIG_SYS_LOAD_ADDR (MEM_BASE) 51 52 /* Physical Memory Map */ 53 #define CONFIG_NR_DRAM_BANKS 1 54 #define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */ 55 #define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */ 56 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 57 58 /* Initial environment variables */ 59 #define UBOOT_IMG_HEAD_SIZE 0x40 60 /* C80000 - 0x40 */ 61 #define CONFIG_EXTRA_ENV_SETTINGS \ 62 "kernel_addr=08007ffc0\0" \ 63 "fdt_addr=0x94C00000\0" \ 64 "fdt_high=0x9fffffff\0" 65 66 /* Do not preserve environment */ 67 #define CONFIG_ENV_SIZE 0x1000 68 69 /* Monitor Command Prompt */ 70 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 71 #define CONFIG_SYS_MAXARGS 64 /* max command args */ 72 #define CONFIG_NO_RELOCATION 1 73 #define PLL_REF_CLK 50000000 /* 50 MHz */ 74 #define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK) 75 76 #endif /* __THUNDERX_88XX_H__ */ 77