1 /* 2 * (C) Copyright 2010-2012 3 * NVIDIA Corporation <www.nvidia.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _TEGRA_COMMON_H_ 9 #define _TEGRA_COMMON_H_ 10 #include <linux/sizes.h> 11 #include <linux/stringify.h> 12 13 /* 14 * High Level Configuration Options 15 */ 16 #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ 17 #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ 18 19 #include <asm/arch/tegra.h> /* get chip and board defs */ 20 21 #define CONFIG_DM 22 #define CONFIG_CMD_DM 23 #define CONFIG_DM_GPIO 24 #ifndef CONFIG_SPL_BUILD 25 #define CONFIG_DM_SERIAL 26 #endif 27 #define CONFIG_DM_SPI 28 #define CONFIG_DM_SPI_FLASH 29 #define CONFIG_DM_I2C 30 31 #define CONFIG_SYS_TIMER_RATE 1000000 32 #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE 33 34 /* 35 * Display CPU and Board information 36 */ 37 #define CONFIG_DISPLAY_CPUINFO 38 #define CONFIG_DISPLAY_BOARDINFO 39 40 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 41 42 /* Environment */ 43 #define CONFIG_ENV_VARS_UBOOT_CONFIG 44 #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */ 45 46 /* 47 * Size of malloc() pool 48 */ 49 #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */ 50 #define CONFIG_SYS_MALLOC_F_LEN (1 << 10) 51 52 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 53 54 /* 55 * NS16550 Configuration 56 */ 57 #ifdef CONFIG_SPL_BUILD 58 #define CONFIG_SYS_NS16550_SERIAL 59 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 60 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 61 #else 62 #define CONFIG_TEGRA_SERIAL 63 #endif 64 #define CONFIG_SYS_NS16550 65 66 /* 67 * Common HW configuration. 68 * If this varies between SoCs later, move to tegraNN-common.h 69 * Note: This is number of devices, not max device ID. 70 */ 71 #define CONFIG_SYS_MMC_MAX_DEVICE 4 72 73 /* 74 * select serial console configuration 75 */ 76 #define CONFIG_CONS_INDEX 1 77 78 /* allow to overwrite serial and ethaddr */ 79 #define CONFIG_ENV_OVERWRITE 80 #define CONFIG_BAUDRATE 115200 81 82 /* include default commands */ 83 #include <config_cmd_default.h> 84 85 /* remove unused commands */ 86 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 87 #undef CONFIG_CMD_FPGA /* FPGA configuration support */ 88 #undef CONFIG_CMD_IMI 89 #undef CONFIG_CMD_IMLS 90 #undef CONFIG_CMD_NFS /* NFS support */ 91 #undef CONFIG_CMD_NET /* network support */ 92 93 /* turn on command-line edit/hist/auto */ 94 #define CONFIG_COMMAND_HISTORY 95 96 /* turn on commonly used storage-related commands */ 97 #define CONFIG_PARTITION_UUIDS 98 #define CONFIG_CMD_PART 99 100 #define CONFIG_SYS_NO_FLASH 101 102 #define CONFIG_CONSOLE_MUX 103 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 104 105 /* 106 * Miscellaneous configurable options 107 */ 108 #define CONFIG_SYS_PROMPT V_PROMPT 109 /* 110 * Increasing the size of the IO buffer as default nfsargs size is more 111 * than 256 and so it is not possible to edit it 112 */ 113 #define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */ 114 /* Print Buffer Size */ 115 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 116 sizeof(CONFIG_SYS_PROMPT) + 16) 117 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 118 /* Boot Argument Buffer Size */ 119 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 120 121 #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) 122 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) 123 124 #ifndef CONFIG_SPL_BUILD 125 #define CONFIG_USE_ARCH_MEMCPY 126 #endif 127 128 /*----------------------------------------------------------------------- 129 * Physical Memory Map 130 */ 131 #define CONFIG_NR_DRAM_BANKS 1 132 #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 133 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ 134 135 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 136 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 137 138 #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ 139 140 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE 141 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 142 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 143 CONFIG_SYS_INIT_RAM_SIZE - \ 144 GENERATED_GBL_DATA_SIZE) 145 146 #define CONFIG_TEGRA_GPIO 147 #define CONFIG_CMD_GPIO 148 #define CONFIG_CMD_ENTERRCM 149 150 /* Defines for SPL */ 151 #define CONFIG_SPL_FRAMEWORK 152 #define CONFIG_SPL_RAM_DEVICE 153 #define CONFIG_SPL_BOARD_INIT 154 #define CONFIG_SPL_NAND_SIMPLE 155 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ 156 CONFIG_SPL_TEXT_BASE) 157 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 158 159 #define CONFIG_SPL_LIBCOMMON_SUPPORT 160 #define CONFIG_SPL_LIBGENERIC_SUPPORT 161 #define CONFIG_SPL_SERIAL_SUPPORT 162 #define CONFIG_SPL_GPIO_SUPPORT 163 164 #define CONFIG_SYS_GENERIC_BOARD 165 166 /* Misc utility code */ 167 #define CONFIG_BOUNCE_BUFFER 168 #define CONFIG_CRC32_VERIFY 169 170 #ifndef CONFIG_SPL_BUILD 171 #include <config_distro_defaults.h> 172 #endif 173 174 #endif /* _TEGRA_COMMON_H_ */ 175