1 /* 2 * (C) Copyright 2010-2012 3 * NVIDIA Corporation <www.nvidia.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _TEGRA_COMMON_H_ 9 #define _TEGRA_COMMON_H_ 10 #include <linux/sizes.h> 11 #include <linux/stringify.h> 12 13 /* 14 * High Level Configuration Options 15 */ 16 #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ 17 18 #include <asm/arch/tegra.h> /* get chip and board defs */ 19 20 /* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */ 21 #ifndef CONFIG_ARM64 22 #define CONFIG_SYS_TIMER_RATE 1000000 23 #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE 24 #endif 25 26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 27 28 /* Environment */ 29 #define CONFIG_ENV_VARS_UBOOT_CONFIG 30 #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */ 31 32 /* 33 * NS16550 Configuration 34 */ 35 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 36 37 /* 38 * Common HW configuration. 39 * If this varies between SoCs later, move to tegraNN-common.h 40 * Note: This is number of devices, not max device ID. 41 */ 42 #define CONFIG_SYS_MMC_MAX_DEVICE 4 43 44 /* 45 * select serial console configuration 46 */ 47 #define CONFIG_CONS_INDEX 1 48 49 /* allow to overwrite serial and ethaddr */ 50 #define CONFIG_ENV_OVERWRITE 51 52 /* turn on command-line edit/hist/auto */ 53 #define CONFIG_CMDLINE_EDITING 54 55 /* 56 * Increasing the size of the IO buffer as default nfsargs size is more 57 * than 256 and so it is not possible to edit it 58 */ 59 #define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */ 60 /* Print Buffer Size */ 61 #define CONFIG_SYS_MAXARGS 64 /* max number of command args */ 62 63 /* Boot Argument Buffer Size */ 64 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 65 66 #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) 67 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) 68 69 /*----------------------------------------------------------------------- 70 * Physical Memory Map 71 */ 72 #define CONFIG_NR_DRAM_BANKS 2 73 #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 74 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ 75 76 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 77 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 78 79 #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ 80 81 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE 82 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 83 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 84 CONFIG_SYS_INIT_RAM_SIZE - \ 85 GENERATED_GBL_DATA_SIZE) 86 87 /* Defines for SPL */ 88 #define CONFIG_SPL_FRAMEWORK 89 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ 90 CONFIG_SPL_TEXT_BASE) 91 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 92 93 /* Misc utility code */ 94 #define CONFIG_BOUNCE_BUFFER 95 96 #ifndef CONFIG_SPL_BUILD 97 #include <config_distro_defaults.h> 98 #endif 99 100 #endif /* _TEGRA_COMMON_H_ */ 101