1 /* 2 * (C) Copyright 2010-2012 3 * NVIDIA Corporation <www.nvidia.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _TEGRA_COMMON_H_ 9 #define _TEGRA_COMMON_H_ 10 #include <linux/sizes.h> 11 #include <linux/stringify.h> 12 13 /* 14 * High Level Configuration Options 15 */ 16 #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ 17 #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ 18 19 #include <asm/arch/tegra.h> /* get chip and board defs */ 20 21 /* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */ 22 #ifndef CONFIG_ARM64 23 #define CONFIG_SYS_TIMER_RATE 1000000 24 #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE 25 #endif 26 27 /* 28 * Display CPU and Board information 29 */ 30 #define CONFIG_DISPLAY_CPUINFO 31 #define CONFIG_DISPLAY_BOARDINFO 32 33 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 34 35 /* Environment */ 36 #define CONFIG_ENV_VARS_UBOOT_CONFIG 37 #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */ 38 39 /* 40 * Size of malloc() pool 41 */ 42 #ifdef CONFIG_DFU_MMC 43 #define CONFIG_SYS_MALLOC_LEN ((4 << 20) + \ 44 CONFIG_SYS_DFU_DATA_BUF_SIZE) 45 #else 46 #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */ 47 #endif 48 49 #ifndef CONFIG_ARM64 50 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 51 #endif 52 53 /* 54 * NS16550 Configuration 55 */ 56 #define CONFIG_TEGRA_SERIAL 57 #define CONFIG_SYS_NS16550 58 59 /* 60 * Common HW configuration. 61 * If this varies between SoCs later, move to tegraNN-common.h 62 * Note: This is number of devices, not max device ID. 63 */ 64 #define CONFIG_SYS_MMC_MAX_DEVICE 4 65 66 /* 67 * select serial console configuration 68 */ 69 #define CONFIG_CONS_INDEX 1 70 71 /* allow to overwrite serial and ethaddr */ 72 #define CONFIG_ENV_OVERWRITE 73 #define CONFIG_BAUDRATE 115200 74 75 /* turn on command-line edit/hist/auto */ 76 #define CONFIG_COMMAND_HISTORY 77 78 /* turn on commonly used storage-related commands */ 79 #define CONFIG_PARTITION_UUIDS 80 #define CONFIG_CMD_PART 81 82 #define CONFIG_SYS_NO_FLASH 83 84 #define CONFIG_CONSOLE_MUX 85 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 86 #ifndef CONFIG_SPL_BUILD 87 #define CONFIG_SYS_STDIO_DEREGISTER 88 #endif 89 90 /* 91 * Increasing the size of the IO buffer as default nfsargs size is more 92 * than 256 and so it is not possible to edit it 93 */ 94 #define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */ 95 /* Print Buffer Size */ 96 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 97 sizeof(CONFIG_SYS_PROMPT) + 16) 98 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 99 /* Boot Argument Buffer Size */ 100 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 101 102 #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) 103 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) 104 105 #ifndef CONFIG_ARM64 106 #ifndef CONFIG_SPL_BUILD 107 #define CONFIG_USE_ARCH_MEMCPY 108 #endif 109 #endif 110 111 /*----------------------------------------------------------------------- 112 * Physical Memory Map 113 */ 114 #define CONFIG_NR_DRAM_BANKS 2 115 #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 116 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ 117 118 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 119 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 120 121 #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ 122 123 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE 124 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 125 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 126 CONFIG_SYS_INIT_RAM_SIZE - \ 127 GENERATED_GBL_DATA_SIZE) 128 129 #define CONFIG_TEGRA_GPIO 130 #define CONFIG_CMD_GPIO 131 #define CONFIG_CMD_ENTERRCM 132 133 /* Defines for SPL */ 134 #define CONFIG_SPL_FRAMEWORK 135 #define CONFIG_SPL_RAM_DEVICE 136 #define CONFIG_SPL_BOARD_INIT 137 #define CONFIG_SPL_NAND_SIMPLE 138 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ 139 CONFIG_SPL_TEXT_BASE) 140 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 141 142 #define CONFIG_SPL_LIBCOMMON_SUPPORT 143 #define CONFIG_SPL_LIBGENERIC_SUPPORT 144 #define CONFIG_SPL_SERIAL_SUPPORT 145 #define CONFIG_SPL_GPIO_SUPPORT 146 147 #define CONFIG_SYS_GENERIC_BOARD 148 #define CONFIG_BOARD_EARLY_INIT_F 149 #define CONFIG_BOARD_LATE_INIT 150 151 /* Misc utility code */ 152 #define CONFIG_BOUNCE_BUFFER 153 #define CONFIG_CRC32_VERIFY 154 155 #ifndef CONFIG_SPL_BUILD 156 #include <config_distro_defaults.h> 157 #endif 158 159 #endif /* _TEGRA_COMMON_H_ */ 160