1 /* 2 * (C) Copyright 2010-2012 3 * NVIDIA Corporation <www.nvidia.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _TEGRA_COMMON_H_ 9 #define _TEGRA_COMMON_H_ 10 #include <linux/sizes.h> 11 #include <linux/stringify.h> 12 13 /* 14 * High Level Configuration Options 15 */ 16 #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ 17 #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ 18 19 #include <asm/arch/tegra.h> /* get chip and board defs */ 20 21 /* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */ 22 #ifndef CONFIG_ARM64 23 #define CONFIG_SYS_TIMER_RATE 1000000 24 #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE 25 #endif 26 27 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 28 29 /* Environment */ 30 #define CONFIG_ENV_VARS_UBOOT_CONFIG 31 #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */ 32 33 /* 34 * NS16550 Configuration 35 */ 36 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 37 38 /* 39 * Common HW configuration. 40 * If this varies between SoCs later, move to tegraNN-common.h 41 * Note: This is number of devices, not max device ID. 42 */ 43 #define CONFIG_SYS_MMC_MAX_DEVICE 4 44 45 /* 46 * select serial console configuration 47 */ 48 #define CONFIG_CONS_INDEX 1 49 50 /* allow to overwrite serial and ethaddr */ 51 #define CONFIG_ENV_OVERWRITE 52 #define CONFIG_BAUDRATE 115200 53 54 /* turn on command-line edit/hist/auto */ 55 #define CONFIG_COMMAND_HISTORY 56 57 /* turn on commonly used storage-related commands */ 58 #define CONFIG_PARTITION_UUIDS 59 #define CONFIG_CMD_PART 60 61 #define CONFIG_SYS_NO_FLASH 62 63 /* 64 * Increasing the size of the IO buffer as default nfsargs size is more 65 * than 256 and so it is not possible to edit it 66 */ 67 #define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */ 68 /* Print Buffer Size */ 69 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 70 sizeof(CONFIG_SYS_PROMPT) + 16) 71 #define CONFIG_SYS_MAXARGS 64 /* max number of command args */ 72 73 /* Boot Argument Buffer Size */ 74 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 75 76 #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) 77 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) 78 79 /*----------------------------------------------------------------------- 80 * Physical Memory Map 81 */ 82 #define CONFIG_NR_DRAM_BANKS 2 83 #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 84 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ 85 86 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 87 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 88 89 #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ 90 91 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE 92 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 93 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 94 CONFIG_SYS_INIT_RAM_SIZE - \ 95 GENERATED_GBL_DATA_SIZE) 96 97 #define CONFIG_CMD_ENTERRCM 98 99 /* Defines for SPL */ 100 #define CONFIG_SPL_FRAMEWORK 101 #define CONFIG_SPL_RAM_DEVICE 102 #define CONFIG_SPL_BOARD_INIT 103 #define CONFIG_SPL_NAND_SIMPLE 104 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ 105 CONFIG_SPL_TEXT_BASE) 106 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 107 108 #define CONFIG_BOARD_EARLY_INIT_F 109 #define CONFIG_BOARD_LATE_INIT 110 111 /* Misc utility code */ 112 #define CONFIG_BOUNCE_BUFFER 113 #define CONFIG_CRC32_VERIFY 114 115 #ifndef CONFIG_SPL_BUILD 116 #include <config_distro_defaults.h> 117 #define CONFIG_FAT_WRITE 118 #endif 119 120 #endif /* _TEGRA_COMMON_H_ */ 121