1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  *  (C) Copyright 2010-2012
4  *  NVIDIA Corporation <www.nvidia.com>
5  */
6 
7 #ifndef _TEGRA_COMMON_H_
8 #define _TEGRA_COMMON_H_
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 
12 /*
13  * High Level Configuration Options
14  */
15 #define CONFIG_SYS_L2CACHE_OFF		/* No L2 cache */
16 
17 #include <asm/arch/tegra.h>		/* get chip and board defs */
18 
19 /* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
20 #ifndef CONFIG_ARM64
21 #define CONFIG_SYS_TIMER_RATE		1000000
22 #define CONFIG_SYS_TIMER_COUNTER	NV_PA_TMRUS_BASE
23 #endif
24 
25 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
26 
27 /* Environment */
28 #define CONFIG_ENV_SIZE			0x2000	/* Total Size Environment */
29 
30 /*
31  * NS16550 Configuration
32  */
33 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
34 
35 /*
36  * Common HW configuration.
37  * If this varies between SoCs later, move to tegraNN-common.h
38  * Note: This is number of devices, not max device ID.
39  */
40 #define CONFIG_SYS_MMC_MAX_DEVICE 4
41 
42 /*
43  * select serial console configuration
44  */
45 
46 /* allow to overwrite serial and ethaddr */
47 #define CONFIG_ENV_OVERWRITE
48 
49 /* turn on command-line edit/hist/auto */
50 
51 /*
52  * Increasing the size of the IO buffer as default nfsargs size is more
53  *  than 256 and so it is not possible to edit it
54  */
55 #define CONFIG_SYS_CBSIZE		(1024 * 2) /* Console I/O Buffer Size */
56 /* Print Buffer Size */
57 #define CONFIG_SYS_MAXARGS		64	/* max number of command args */
58 
59 /* Boot Argument Buffer Size */
60 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
61 
62 #define CONFIG_SYS_MEMTEST_START	(NV_PA_SDRC_CS0 + 0x600000)
63 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
64 
65 /*-----------------------------------------------------------------------
66  * Physical Memory Map
67  */
68 #define CONFIG_NR_DRAM_BANKS	2
69 #define PHYS_SDRAM_1		NV_PA_SDRC_CS0
70 #define PHYS_SDRAM_1_SIZE	0x20000000	/* 512M */
71 
72 #define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
73 #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
74 
75 #define CONFIG_SYS_BOOTMAPSZ	(256 << 20)	/* 256M */
76 
77 #ifndef CONFIG_ARM64
78 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_STACKBASE
79 #define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
80 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
81 						CONFIG_SYS_INIT_RAM_SIZE - \
82 						GENERATED_GBL_DATA_SIZE)
83 #endif
84 
85 #ifndef CONFIG_ARM64
86 /* Defines for SPL */
87 #define CONFIG_SPL_MAX_FOOTPRINT	(CONFIG_SYS_TEXT_BASE - \
88 						CONFIG_SPL_TEXT_BASE)
89 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000
90 #endif
91 
92 /* Misc utility code */
93 #define CONFIG_BOUNCE_BUFFER
94 
95 #endif /* _TEGRA_COMMON_H_ */
96