1 /*
2  *  (C) Copyright 2010-2012
3  *  NVIDIA Corporation <www.nvidia.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef _TEGRA_COMMON_H_
9 #define _TEGRA_COMMON_H_
10 #include <linux/sizes.h>
11 #include <linux/stringify.h>
12 
13 /*
14  * High Level Configuration Options
15  */
16 #define CONFIG_SYS_L2CACHE_OFF		/* No L2 cache */
17 
18 #include <asm/arch/tegra.h>		/* get chip and board defs */
19 
20 /* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
21 #ifndef CONFIG_ARM64
22 #define CONFIG_SYS_TIMER_RATE		1000000
23 #define CONFIG_SYS_TIMER_COUNTER	NV_PA_TMRUS_BASE
24 #endif
25 
26 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
27 
28 /* Environment */
29 #define CONFIG_ENV_SIZE			0x2000	/* Total Size Environment */
30 
31 /*
32  * NS16550 Configuration
33  */
34 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
35 
36 /*
37  * Common HW configuration.
38  * If this varies between SoCs later, move to tegraNN-common.h
39  * Note: This is number of devices, not max device ID.
40  */
41 #define CONFIG_SYS_MMC_MAX_DEVICE 4
42 
43 /*
44  * select serial console configuration
45  */
46 #define CONFIG_CONS_INDEX	1
47 
48 /* allow to overwrite serial and ethaddr */
49 #define CONFIG_ENV_OVERWRITE
50 
51 /* turn on command-line edit/hist/auto */
52 
53 /*
54  * Increasing the size of the IO buffer as default nfsargs size is more
55  *  than 256 and so it is not possible to edit it
56  */
57 #define CONFIG_SYS_CBSIZE		(1024 * 2) /* Console I/O Buffer Size */
58 /* Print Buffer Size */
59 #define CONFIG_SYS_MAXARGS		64	/* max number of command args */
60 
61 /* Boot Argument Buffer Size */
62 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
63 
64 #define CONFIG_SYS_MEMTEST_START	(NV_PA_SDRC_CS0 + 0x600000)
65 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
66 
67 /*-----------------------------------------------------------------------
68  * Physical Memory Map
69  */
70 #define CONFIG_NR_DRAM_BANKS	2
71 #define PHYS_SDRAM_1		NV_PA_SDRC_CS0
72 #define PHYS_SDRAM_1_SIZE	0x20000000	/* 512M */
73 
74 #define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
75 #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
76 
77 #define CONFIG_SYS_BOOTMAPSZ	(256 << 20)	/* 256M */
78 
79 #ifndef CONFIG_ARM64
80 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_STACKBASE
81 #define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
82 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
83 						CONFIG_SYS_INIT_RAM_SIZE - \
84 						GENERATED_GBL_DATA_SIZE)
85 #endif
86 
87 #ifndef CONFIG_ARM64
88 /* Defines for SPL */
89 #define CONFIG_SPL_MAX_FOOTPRINT	(CONFIG_SYS_TEXT_BASE - \
90 						CONFIG_SPL_TEXT_BASE)
91 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000
92 #endif
93 
94 /* Misc utility code */
95 #define CONFIG_BOUNCE_BUFFER
96 
97 #endif /* _TEGRA_COMMON_H_ */
98