1 /*
2  *  (C) Copyright 2010-2012
3  *  NVIDIA Corporation <www.nvidia.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef _TEGRA_COMMON_H_
9 #define _TEGRA_COMMON_H_
10 #include <linux/sizes.h>
11 #include <linux/stringify.h>
12 
13 /*
14  * High Level Configuration Options
15  */
16 #define CONFIG_ARMCORTEXA9		/* This is an ARM V7 CPU core */
17 #define CONFIG_SYS_L2CACHE_OFF		/* No L2 cache */
18 
19 #include <asm/arch/tegra.h>		/* get chip and board defs */
20 
21 /* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
22 #ifndef CONFIG_ARM64
23 #define CONFIG_SYS_TIMER_RATE		1000000
24 #define CONFIG_SYS_TIMER_COUNTER	NV_PA_TMRUS_BASE
25 #endif
26 
27 /*
28  * Display CPU and Board information
29  */
30 #define CONFIG_DISPLAY_CPUINFO
31 #define CONFIG_DISPLAY_BOARDINFO
32 
33 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
34 
35 /* Environment */
36 #define CONFIG_ENV_VARS_UBOOT_CONFIG
37 #define CONFIG_ENV_SIZE			0x2000	/* Total Size Environment */
38 
39 /*
40  * NS16550 Configuration
41  */
42 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
43 
44 /*
45  * Common HW configuration.
46  * If this varies between SoCs later, move to tegraNN-common.h
47  * Note: This is number of devices, not max device ID.
48  */
49 #define CONFIG_SYS_MMC_MAX_DEVICE 4
50 
51 /*
52  * select serial console configuration
53  */
54 #define CONFIG_CONS_INDEX	1
55 
56 /* allow to overwrite serial and ethaddr */
57 #define CONFIG_ENV_OVERWRITE
58 #define CONFIG_BAUDRATE			115200
59 
60 /* turn on command-line edit/hist/auto */
61 #define CONFIG_COMMAND_HISTORY
62 
63 /* turn on commonly used storage-related commands */
64 #define CONFIG_PARTITION_UUIDS
65 #define CONFIG_CMD_PART
66 
67 #define CONFIG_SYS_NO_FLASH
68 
69 #define CONFIG_CONSOLE_MUX
70 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
71 #ifndef CONFIG_SPL_BUILD
72 #define CONFIG_SYS_STDIO_DEREGISTER
73 #endif
74 
75 /*
76  * Increasing the size of the IO buffer as default nfsargs size is more
77  *  than 256 and so it is not possible to edit it
78  */
79 #define CONFIG_SYS_CBSIZE		(256 * 2) /* Console I/O Buffer Size */
80 /* Print Buffer Size */
81 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
82 					sizeof(CONFIG_SYS_PROMPT) + 16)
83 #define CONFIG_SYS_MAXARGS		32	/* max number of command args */
84 /* Boot Argument Buffer Size */
85 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
86 
87 #define CONFIG_SYS_MEMTEST_START	(NV_PA_SDRC_CS0 + 0x600000)
88 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
89 
90 #ifndef CONFIG_ARM64
91 #ifndef CONFIG_SPL_BUILD
92 #define CONFIG_USE_ARCH_MEMCPY
93 #endif
94 #endif
95 
96 /*-----------------------------------------------------------------------
97  * Physical Memory Map
98  */
99 #define CONFIG_NR_DRAM_BANKS	2
100 #define PHYS_SDRAM_1		NV_PA_SDRC_CS0
101 #define PHYS_SDRAM_1_SIZE	0x20000000	/* 512M */
102 
103 #define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
104 #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
105 
106 #define CONFIG_SYS_BOOTMAPSZ	(256 << 20)	/* 256M */
107 
108 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_STACKBASE
109 #define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
110 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
111 						CONFIG_SYS_INIT_RAM_SIZE - \
112 						GENERATED_GBL_DATA_SIZE)
113 
114 #define CONFIG_CMD_ENTERRCM
115 
116 /* Defines for SPL */
117 #define CONFIG_SPL_FRAMEWORK
118 #define CONFIG_SPL_RAM_DEVICE
119 #define CONFIG_SPL_BOARD_INIT
120 #define CONFIG_SPL_NAND_SIMPLE
121 #define CONFIG_SPL_MAX_FOOTPRINT	(CONFIG_SYS_TEXT_BASE - \
122 						CONFIG_SPL_TEXT_BASE)
123 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000
124 
125 #define CONFIG_BOARD_EARLY_INIT_F
126 #define CONFIG_BOARD_LATE_INIT
127 
128 /* Misc utility code */
129 #define CONFIG_BOUNCE_BUFFER
130 #define CONFIG_CRC32_VERIFY
131 
132 #ifndef CONFIG_SPL_BUILD
133 #include <config_distro_defaults.h>
134 #define CONFIG_FAT_WRITE
135 #endif
136 
137 #endif /* _TEGRA_COMMON_H_ */
138