1 /* 2 * (C) Copyright 2010-2012 3 * NVIDIA Corporation <www.nvidia.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _TEGRA_COMMON_H_ 9 #define _TEGRA_COMMON_H_ 10 #include <linux/sizes.h> 11 #include <linux/stringify.h> 12 13 /* 14 * High Level Configuration Options 15 */ 16 #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ 17 #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ 18 19 #include <asm/arch/tegra.h> /* get chip and board defs */ 20 21 /* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */ 22 #ifndef CONFIG_ARM64 23 #define CONFIG_SYS_TIMER_RATE 1000000 24 #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE 25 #endif 26 27 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 28 29 /* Environment */ 30 #define CONFIG_ENV_VARS_UBOOT_CONFIG 31 #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */ 32 33 /* 34 * NS16550 Configuration 35 */ 36 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 37 38 /* 39 * Common HW configuration. 40 * If this varies between SoCs later, move to tegraNN-common.h 41 * Note: This is number of devices, not max device ID. 42 */ 43 #define CONFIG_SYS_MMC_MAX_DEVICE 4 44 45 /* 46 * select serial console configuration 47 */ 48 #define CONFIG_CONS_INDEX 1 49 50 /* allow to overwrite serial and ethaddr */ 51 #define CONFIG_ENV_OVERWRITE 52 #define CONFIG_BAUDRATE 115200 53 54 /* turn on command-line edit/hist/auto */ 55 #define CONFIG_COMMAND_HISTORY 56 57 /* turn on commonly used storage-related commands */ 58 #define CONFIG_PARTITION_UUIDS 59 #define CONFIG_CMD_PART 60 61 #define CONFIG_SYS_NO_FLASH 62 63 #ifndef CONFIG_SPL_BUILD 64 #define CONFIG_SYS_STDIO_DEREGISTER 65 #endif 66 67 /* 68 * Increasing the size of the IO buffer as default nfsargs size is more 69 * than 256 and so it is not possible to edit it 70 */ 71 #define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */ 72 /* Print Buffer Size */ 73 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 74 sizeof(CONFIG_SYS_PROMPT) + 16) 75 #define CONFIG_SYS_MAXARGS 64 /* max number of command args */ 76 77 /* Boot Argument Buffer Size */ 78 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 79 80 #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) 81 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) 82 83 #ifndef CONFIG_ARM64 84 #ifndef CONFIG_SPL_BUILD 85 #define CONFIG_USE_ARCH_MEMCPY 86 #endif 87 #endif 88 89 /*----------------------------------------------------------------------- 90 * Physical Memory Map 91 */ 92 #define CONFIG_NR_DRAM_BANKS 2 93 #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 94 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ 95 96 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 97 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 98 99 #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ 100 101 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE 102 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 103 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 104 CONFIG_SYS_INIT_RAM_SIZE - \ 105 GENERATED_GBL_DATA_SIZE) 106 107 #define CONFIG_CMD_ENTERRCM 108 109 /* Defines for SPL */ 110 #define CONFIG_SPL_FRAMEWORK 111 #define CONFIG_SPL_RAM_DEVICE 112 #define CONFIG_SPL_BOARD_INIT 113 #define CONFIG_SPL_NAND_SIMPLE 114 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ 115 CONFIG_SPL_TEXT_BASE) 116 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 117 118 #define CONFIG_BOARD_EARLY_INIT_F 119 #define CONFIG_BOARD_LATE_INIT 120 121 /* Misc utility code */ 122 #define CONFIG_BOUNCE_BUFFER 123 #define CONFIG_CRC32_VERIFY 124 125 #ifndef CONFIG_SPL_BUILD 126 #include <config_distro_defaults.h> 127 #define CONFIG_FAT_WRITE 128 #endif 129 130 #endif /* _TEGRA_COMMON_H_ */ 131