1 /* 2 * Copyright (C) 2014 Soeren Moch <smoch@web.de> 3 * 4 * Configuration settings for the TBS2910 MatrixARM board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __TBS2910_CONFIG_H 10 #define __TBS2910_CONFIG_H 11 12 #include "mx6_common.h" 13 14 /* General configuration */ 15 16 #define CONFIG_MACH_TYPE 3980 17 18 #define CONFIG_SYS_HZ 1000 19 20 #define CONFIG_IMX_THERMAL 21 22 /* Physical Memory Map */ 23 #define CONFIG_NR_DRAM_BANKS 1 24 #define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR 25 26 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 27 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 28 #define CONFIG_SYS_INIT_SP_OFFSET \ 29 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 30 #define CONFIG_SYS_INIT_SP_ADDR \ 31 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 32 33 #define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024) 34 35 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 36 #define CONFIG_SYS_MEMTEST_END \ 37 (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024) 38 39 #define CONFIG_SYS_BOOTMAPSZ 0x10000000 40 41 /* Serial console */ 42 #define CONFIG_MXC_UART 43 #define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */ 44 45 #define CONFIG_CONS_INDEX 1 46 47 /* Filesystems / image support */ 48 49 /* MMC */ 50 #define CONFIG_SYS_FSL_USDHC_NUM 3 51 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR 52 #define CONFIG_SUPPORT_EMMC_BOOT 53 54 /* Ethernet */ 55 #define CONFIG_FEC_MXC 56 #define CONFIG_FEC_MXC 57 #define CONFIG_MII 58 #define IMX_FEC_BASE ENET_BASE_ADDR 59 #define CONFIG_FEC_XCV_TYPE RGMII 60 #define CONFIG_ETHPRIME "FEC" 61 #define CONFIG_FEC_MXC_PHYADDR 4 62 #define CONFIG_PHYLIB 63 #define CONFIG_PHY_ATHEROS 64 65 /* Framebuffer */ 66 #ifdef CONFIG_VIDEO 67 #define CONFIG_VIDEO_IPUV3 68 #define CONFIG_IPUV3_CLK 260000000 69 #define CONFIG_VIDEO_BMP_RLE8 70 #define CONFIG_IMX_HDMI 71 #define CONFIG_IMX_VIDEO_SKIP 72 #define CONFIG_CMD_HDMIDETECT 73 #endif 74 75 /* PCI */ 76 #define CONFIG_CMD_PCI 77 #ifdef CONFIG_CMD_PCI 78 #define CONFIG_PCI_SCAN_SHOW 79 #define CONFIG_PCIE_IMX 80 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 81 #endif 82 83 /* SATA */ 84 #define CONFIG_CMD_SATA 85 #ifdef CONFIG_CMD_SATA 86 #define CONFIG_DWC_AHSATA 87 #define CONFIG_SYS_SATA_MAX_DEVICE 1 88 #define CONFIG_DWC_AHSATA_PORT_ID 0 89 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 90 #define CONFIG_LBA48 91 #define CONFIG_LIBATA 92 #endif 93 94 /* USB */ 95 #ifdef CONFIG_CMD_USB 96 #define CONFIG_USB_EHCI 97 #define CONFIG_USB_EHCI_MX6 98 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 99 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 100 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 101 #ifdef CONFIG_CMD_USB_MASS_STORAGE 102 #define CONFIG_USBD_HS 103 #define CONFIG_USB_FUNCTION_MASS_STORAGE 104 #endif /* CONFIG_CMD_USB_MASS_STORAGE */ 105 #ifdef CONFIG_USB_KEYBOARD 106 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 107 #define CONFIG_PREBOOT \ 108 "usb start; " \ 109 "if hdmidet; then " \ 110 "run set_con_hdmi; " \ 111 "else " \ 112 "run set_con_serial; " \ 113 "fi;" 114 #endif /* CONFIG_USB_KEYBOARD */ 115 #endif /* CONFIG_CMD_USB */ 116 117 /* RTC */ 118 #ifdef CONFIG_CMD_DATE 119 #define CONFIG_RTC_DS1307 120 #define CONFIG_SYS_RTC_BUS_NUM 2 121 #endif 122 123 /* I2C */ 124 #ifdef CONFIG_CMD_I2C 125 #define CONFIG_SYS_I2C 126 #define CONFIG_SYS_I2C_MXC 127 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 128 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 129 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 130 #define CONFIG_SYS_I2C_SPEED 100000 131 #define CONFIG_I2C_EDID 132 #endif 133 134 /* Environment organization */ 135 #define CONFIG_ENV_IS_IN_MMC 136 #define CONFIG_SYS_MMC_ENV_DEV 2 /* overwritten on SD boot */ 137 #define CONFIG_SYS_MMC_ENV_PART 1 /* overwritten on SD boot */ 138 #define CONFIG_ENV_SIZE (8 * 1024) 139 #define CONFIG_ENV_OFFSET (384 * 1024) 140 #define CONFIG_ENV_OVERWRITE 141 142 #define CONFIG_EXTRA_ENV_SETTINGS \ 143 "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \ 144 "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \ 145 "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \ 146 "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \ 147 "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \ 148 "${bootargs_mmc3}\0" \ 149 "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \ 150 "rdinit=/sbin/init enable_wait_mode=off\0" \ 151 "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \ 152 "mmc read 0x10800000 0x800 0x4000; bootm 0x10800000\0" \ 153 "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \ 154 "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \ 155 "run bootargs_upd; " \ 156 "bootm 0x10800000 0x10d00000\0" \ 157 "console=ttymxc0\0" \ 158 "fan=gpio set 92\0" \ 159 "set_con_serial=setenv stdout serial; " \ 160 "setenv stderr serial;\0" \ 161 "set_con_hdmi=setenv stdout serial,vga; " \ 162 "setenv stderr serial,vga;\0" \ 163 "stderr=serial,vga;\0" \ 164 "stdin=serial,usbkbd;\0" \ 165 "stdout=serial,vga;\0" 166 167 #define CONFIG_BOOTCOMMAND \ 168 "mmc rescan; " \ 169 "if run bootcmd_up1; then " \ 170 "run bootcmd_up2; " \ 171 "else " \ 172 "run bootcmd_mmc; " \ 173 "fi" 174 175 #endif /* __TBS2910_CONFIG_H * */ 176