xref: /openbmc/u-boot/include/configs/tbs2910.h (revision 68e7999b)
1 /*
2  * Copyright (C) 2014 Soeren Moch <smoch@web.de>
3  *
4  * Configuration settings for the TBS2910 MatrixARM board.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __TBS2910_CONFIG_H
10 #define __TBS2910_CONFIG_H
11 
12 #include "mx6_common.h"
13 
14 /* General configuration */
15 #define CONFIG_SYS_THUMB_BUILD
16 
17 #define CONFIG_MACH_TYPE		3980
18 
19 #define CONFIG_BOARD_EARLY_INIT_F
20 
21 #define CONFIG_SYS_HZ			1000
22 
23 #define CONFIG_IMX_THERMAL
24 
25 /* Physical Memory Map */
26 #define CONFIG_NR_DRAM_BANKS		1
27 #define CONFIG_SYS_SDRAM_BASE		MMDC0_ARB_BASE_ADDR
28 
29 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
30 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
31 #define CONFIG_SYS_INIT_SP_OFFSET \
32 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
33 #define CONFIG_SYS_INIT_SP_ADDR \
34 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
35 
36 #define CONFIG_SYS_MALLOC_LEN		(128 * 1024 * 1024)
37 
38 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
39 #define CONFIG_SYS_MEMTEST_END \
40 	(CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
41 
42 #define CONFIG_SYS_BOOTMAPSZ		0x10000000
43 
44 /* Serial console */
45 #define CONFIG_MXC_UART
46 #define CONFIG_MXC_UART_BASE		UART1_BASE /* select UART1/UART2 */
47 #define CONFIG_BAUDRATE			115200
48 
49 #define CONFIG_CONS_INDEX		1
50 
51 /* *** Command definition *** */
52 #define CONFIG_CMD_BMODE
53 #define CONFIG_CMD_PART
54 
55 /* Filesystems / image support */
56 #define CONFIG_EFI_PARTITION
57 #define CONFIG_PARTITION_UUIDS
58 
59 /* MMC */
60 #define CONFIG_SYS_FSL_USDHC_NUM	3
61 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC4_BASE_ADDR
62 #define CONFIG_SUPPORT_EMMC_BOOT
63 
64 /* Ethernet */
65 #define CONFIG_FEC_MXC
66 #define CONFIG_FEC_MXC
67 #define CONFIG_MII
68 #define IMX_FEC_BASE			ENET_BASE_ADDR
69 #define CONFIG_FEC_XCV_TYPE		RGMII
70 #define CONFIG_ETHPRIME			"FEC"
71 #define CONFIG_FEC_MXC_PHYADDR		4
72 #define CONFIG_PHYLIB
73 #define CONFIG_PHY_ATHEROS
74 
75 /* Framebuffer */
76 #ifdef CONFIG_VIDEO
77 #define CONFIG_VIDEO_IPUV3
78 #define CONFIG_IPUV3_CLK		260000000
79 #define CONFIG_VIDEO_BMP_RLE8
80 #define CONFIG_IMX_HDMI
81 #define CONFIG_IMX_VIDEO_SKIP
82 #define CONFIG_CMD_HDMIDETECT
83 #endif
84 
85 /* PCI */
86 #define CONFIG_CMD_PCI
87 #ifdef CONFIG_CMD_PCI
88 #define CONFIG_PCI_SCAN_SHOW
89 #define CONFIG_PCIE_IMX
90 #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(7, 12)
91 #endif
92 
93 /* SATA */
94 #define CONFIG_CMD_SATA
95 #ifdef CONFIG_CMD_SATA
96 #define CONFIG_DWC_AHSATA
97 #define CONFIG_SYS_SATA_MAX_DEVICE	1
98 #define CONFIG_DWC_AHSATA_PORT_ID	0
99 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
100 #define CONFIG_LBA48
101 #define CONFIG_LIBATA
102 #endif
103 
104 /* USB */
105 #ifdef CONFIG_CMD_USB
106 #define CONFIG_USB_EHCI
107 #define CONFIG_USB_EHCI_MX6
108 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
109 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
110 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
111 #ifdef CONFIG_CMD_USB_MASS_STORAGE
112 #define CONFIG_USBD_HS
113 #define CONFIG_USB_FUNCTION_MASS_STORAGE
114 #endif /* CONFIG_CMD_USB_MASS_STORAGE */
115 #ifdef CONFIG_USB_KEYBOARD
116 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
117 #define CONFIG_PREBOOT \
118 	"usb start; " \
119 	"if hdmidet; then " \
120 		"run set_con_hdmi; " \
121 	"else " \
122 		"run set_con_serial; " \
123 	"fi;"
124 #endif /* CONFIG_USB_KEYBOARD */
125 #endif /* CONFIG_CMD_USB      */
126 
127 /* RTC */
128 #define CONFIG_CMD_DATE
129 #ifdef CONFIG_CMD_DATE
130 #define CONFIG_RTC_DS1307
131 #define CONFIG_SYS_RTC_BUS_NUM		2
132 #endif
133 
134 /* I2C */
135 #ifdef CONFIG_CMD_I2C
136 #define CONFIG_SYS_I2C
137 #define CONFIG_SYS_I2C_MXC
138 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
139 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
140 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
141 #define CONFIG_SYS_I2C_SPEED		100000
142 #define CONFIG_I2C_EDID
143 #endif
144 
145 /* Environment organization */
146 #define CONFIG_ENV_IS_IN_MMC
147 #define CONFIG_SYS_MMC_ENV_DEV		2 /* overwritten on SD boot */
148 #define CONFIG_SYS_MMC_ENV_PART		1 /* overwritten on SD boot */
149 #define CONFIG_ENV_SIZE			(8 * 1024)
150 #define CONFIG_ENV_OFFSET		(384 * 1024)
151 #define CONFIG_ENV_OVERWRITE
152 
153 #define CONFIG_EXTRA_ENV_SETTINGS \
154 	"bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
155 	"bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
156 			"video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
157 	"bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
158 	"bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
159 			"${bootargs_mmc3}\0" \
160 	"bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
161 			"rdinit=/sbin/init enable_wait_mode=off\0" \
162 	"bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
163 			"mmc read 0x10800000 0x800 0x4000; bootm 0x10800000\0" \
164 	"bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
165 	"bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
166 			"run bootargs_upd; " \
167 			"bootm 0x10800000 0x10d00000\0" \
168 	"console=ttymxc0\0" \
169 	"fan=gpio set 92\0" \
170 	"set_con_serial=setenv stdout serial; " \
171 			"setenv stderr serial;\0" \
172 	"set_con_hdmi=setenv stdout serial,vga; " \
173 			"setenv stderr serial,vga;\0" \
174 	"stderr=serial,vga;\0" \
175 	"stdin=serial,usbkbd;\0" \
176 	"stdout=serial,vga;\0"
177 
178 #define CONFIG_BOOTCOMMAND \
179 	"mmc rescan; " \
180 	"if run bootcmd_up1; then " \
181 		"run bootcmd_up2; " \
182 	"else " \
183 		"run bootcmd_mmc; " \
184 	"fi"
185 
186 #endif			       /* __TBS2910_CONFIG_H * */
187