1 /* 2 * Copyright (C) 2011-2014 Pierrick Hascoet, Abilis Systems 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _CONFIG_TB100_H_ 8 #define _CONFIG_TB100_H_ 9 10 #include <linux/sizes.h> 11 12 /* 13 * Memory configuration 14 */ 15 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 16 17 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 18 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE 19 #define CONFIG_SYS_SDRAM_SIZE SZ_128M 20 21 #define CONFIG_SYS_INIT_SP_ADDR \ 22 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) 23 24 #define CONFIG_SYS_MALLOC_LEN SZ_128K 25 #define CONFIG_SYS_BOOTM_LEN SZ_32M 26 #define CONFIG_SYS_LOAD_ADDR 0x82000000 27 28 /* 29 * UART configuration 30 */ 31 #define CONFIG_SYS_NS16550_SERIAL 32 #define CONFIG_SYS_NS16550_CLK 166666666 33 34 /* 35 * Even though the board houses Realtek RTL8211E PHY 36 * corresponding PHY driver (drivers/net/phy/realtek.c) behaves unexpectedly. 37 * In particular "parse_status" reports link is down. 38 * 39 * Until Realtek PHY driver is fixed fall back to generic PHY driver 40 * which implements all required functionality and behaves much more stable. 41 * 42 * #define CONFIG_PHY_REALTEK 43 * 44 */ 45 46 /* 47 * Ethernet configuration 48 */ 49 #define ETH0_BASE_ADDRESS 0xFE100000 50 #define ETH1_BASE_ADDRESS 0xFE110000 51 52 /* 53 * Command line configuration 54 */ 55 56 #define CONFIG_AUTO_COMPLETE 57 #define CONFIG_CMDLINE_EDITING 58 59 /* 60 * Environment settings 61 */ 62 #define CONFIG_ENV_SIZE SZ_2K 63 #define CONFIG_ENV_OFFSET 0 64 65 /* 66 * Environment configuration 67 */ 68 #define CONFIG_BOOTFILE "uImage" 69 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR 70 71 /* 72 * Console configuration 73 */ 74 #define CONFIG_SYS_LONGHELP 75 76 #endif /* _CONFIG_TB100_H_ */ 77