xref: /openbmc/u-boot/include/configs/taurus.h (revision ad3098f7)
1 /*
2  * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
3  * (C) Copyright 2013 Siemens AG
4  *
5  * Based on:
6  * U-Boot file: include/configs/at91sam9260ek.h
7  *
8  * (C) Copyright 2007-2008
9  * Stelian Pop <stelian@popies.net>
10  * Lead Tech Design <www.leadtechdesign.com>
11  *
12  * SPDX-License-Identifier:	GPL-2.0+
13  */
14 
15 #ifndef __CONFIG_H
16 #define __CONFIG_H
17 
18 /*
19  * SoC must be defined first, before hardware.h is included.
20  * In this case SoC is defined in boards.cfg.
21  */
22 #include <asm/hardware.h>
23 #include <linux/sizes.h>
24 
25 #if defined(CONFIG_SPL_BUILD)
26 #define CONFIG_SYS_THUMB_BUILD
27 #define CONFIG_SYS_ICACHE_OFF
28 #define CONFIG_SYS_DCACHE_OFF
29 #endif
30 /*
31  * Warning: changing CONFIG_SYS_TEXT_BASE requires
32  * adapting the initial boot program.
33  * Since the linker has to swallow that define, we must use a pure
34  * hex number here!
35  */
36 
37 #define CONFIG_SYS_TEXT_BASE		0x21000000
38 
39 /* ARM asynchronous clock */
40 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
41 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */
42 
43 /* Misc CPU related */
44 #define CONFIG_ARCH_CPU_INIT
45 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
46 #define CONFIG_SETUP_MEMORY_TAGS
47 #define CONFIG_INITRD_TAG
48 #define CONFIG_SKIP_LOWLEVEL_INIT
49 #define CONFIG_BOARD_EARLY_INIT_F
50 #define CONFIG_DISPLAY_CPUINFO
51 
52 /* general purpose I/O */
53 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
54 #define CONFIG_AT91_GPIO
55 #define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
56 
57 /* serial console */
58 #define CONFIG_ATMEL_USART
59 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
60 #define CONFIG_USART_ID			ATMEL_ID_SYS
61 #define CONFIG_BAUDRATE			115200
62 
63 #define CONFIG_BOOTDELAY	3
64 
65 /*
66  * Command line configuration.
67  */
68 #define CONFIG_CMD_NAND
69 
70 /*
71  * SDRAM: 1 bank, min 32, max 128 MB
72  * Initialized before u-boot gets started.
73  */
74 #define CONFIG_NR_DRAM_BANKS		1
75 #define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
76 #define CONFIG_SYS_SDRAM_SIZE		(128 * SZ_1M)
77 
78 /*
79  * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
80  * leaving the correct space for initial global data structure above
81  * that address while providing maximum stack area below.
82  */
83 #define CONFIG_SYS_INIT_SP_ADDR \
84 	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
85 
86 /* NAND flash */
87 #ifdef CONFIG_CMD_NAND
88 #define CONFIG_NAND_ATMEL
89 #define CONFIG_SYS_MAX_NAND_DEVICE	1
90 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
91 #define CONFIG_SYS_NAND_DBW_8
92 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
93 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
94 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
95 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
96 #endif
97 
98 /* NOR flash - no real flash on this board */
99 #define CONFIG_SYS_NO_FLASH			1
100 
101 /* Ethernet */
102 #define CONFIG_MACB
103 #define CONFIG_RMII
104 #define CONFIG_AT91_WANTS_COMMON_PHY
105 
106 #define CONFIG_AT91SAM9_WATCHDOG
107 #define CONFIG_AT91_HW_WDT_TIMEOUT	15
108 #if !defined(CONFIG_SPL_BUILD)
109 /* Enable the watchdog */
110 #define CONFIG_HW_WATCHDOG
111 #endif
112 
113 /* USB */
114 #if defined(CONFIG_BOARD_TAURUS)
115 #define CONFIG_USB_ATMEL
116 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
117 #define CONFIG_USB_OHCI_NEW
118 #define CONFIG_SYS_USB_OHCI_CPU_INIT
119 #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000
120 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9260"
121 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
122 #define CONFIG_USB_STORAGE
123 
124 /* USB DFU support */
125 #define CONFIG_CMD_MTDPARTS
126 #define CONFIG_MTD_DEVICE
127 #define CONFIG_MTD_PARTITIONS
128 
129 #define CONFIG_USB_GADGET_AT91
130 
131 /* DFU class support */
132 #define CONFIG_USB_FUNCTION_DFU
133 #define CONFIG_DFU_NAND
134 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	(SZ_1M)
135 #define DFU_MANIFEST_POLL_TIMEOUT	25000
136 
137 #define CONFIG_SYS_CACHELINE_SIZE	SZ_8K
138 #endif
139 
140 /* SPI EEPROM */
141 #define CONFIG_SPI
142 #define CONFIG_ATMEL_SPI
143 #define TAURUS_SPI_MASK (1 << 4)
144 #define TAURUS_SPI_CS_PIN	AT91_PIN_PA3
145 
146 #if defined(CONFIG_SPL_BUILD)
147 /* SPL related */
148 #undef CONFIG_SPL_OS_BOOT		/* Not supported by existing map */
149 #define CONFIG_SPL_SPI_SUPPORT
150 #define CONFIG_SPL_SPI_FLASH_SUPPORT
151 #define CONFIG_SPL_SPI_LOAD
152 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
153 
154 #define CONFIG_SF_DEFAULT_BUS 0
155 #define CONFIG_SF_DEFAULT_SPEED 1000000
156 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
157 #endif
158 
159 /* load address */
160 #define CONFIG_SYS_LOAD_ADDR			0x22000000
161 
162 /* bootstrap in spi flash , u-boot + env + linux in nandflash */
163 #define CONFIG_ENV_IS_IN_NAND
164 #define CONFIG_ENV_OFFSET		0x100000
165 #define CONFIG_ENV_OFFSET_REDUND	0x180000
166 #define CONFIG_ENV_SIZE		(SZ_128K)	/* 1 sector = 128 kB */
167 #define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0x200000 0x300000; bootm"
168 
169 #if defined(CONFIG_BOARD_TAURUS)
170 #define	CONFIG_BOOTARGS_TAURUS						\
171 	"console=ttyS0,115200 earlyprintk "				\
172 	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
173 	"256k(env),256k(env_redundant),256k(spare),"			\
174 	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
175 	"root=/dev/mtdblock7 rw rootfstype=jffs2"
176 #endif
177 
178 #if defined(CONFIG_BOARD_AXM)
179 #define CONFIG_BOOTARGS_AXM						\
180 	"\0"	\
181 	"addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:"	\
182 	"${gatewayip}:${netmask}:${hostname}:${netdev}::off\0"		\
183 	"addtest=setenv bootargs ${bootargs} loglevel=4 test\0"		\
184 	"baudrate=115200\0"						\
185 	"boot_file=setenv bootfile /${project_dir}/kernel/uImage\0"	\
186 	"boot_retries=0\0"						\
187 	"bootcmd=run flash_self\0"					\
188 	"bootdelay=3\0"							\
189 	"ethact=macb0\0"						\
190 	"flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
191 	"bootm ${kernel_ram};reset\0"					\
192 	"flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
193 	"bootm ${kernel_ram};reset\0"					\
194 	"flash_self_test=run nand_kernel;run setbootargs addtest; "	\
195 	"upgrade_available;bootm ${kernel_ram};reset\0"			\
196 	"hostname=systemone\0"						\
197 	"kernel_Off=0x00200000\0"					\
198 	"kernel_Off_fallback=0x03800000\0"				\
199 	"kernel_ram=0x21500000\0"					\
200 	"kernel_size=0x00400000\0"					\
201 	"kernel_size_fallback=0x00400000\0"				\
202 	"loads_echo=1\0"						\
203 	"nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} "		\
204 		"${kernel_size}\0"					\
205 	"net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};"		\
206 	"run nfsargs;run addip;upgrade_available;bootm "		\
207 		"${kernel_ram};reset\0"					\
208 	"netdev=eth0\0"							\
209 	"nfsargs=run root_path;setenv bootargs ${bootargs} "		\
210 	"root=/dev/nfs rw nfsroot=${serverip}:${rootpath} "		\
211 	"at91sam9_wdt.wdt_timeout=16\0"					\
212 	"partitionset_active=A\0"					\
213 	"preboot=echo;echo Type 'run flash_self' to use kernel and root "\
214 	"filesystem on memory;echo Type 'run flash_nfs' to use kernel "	\
215 	"from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
216 	"to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
217 	"project_dir=systemone\0"					\
218 	"root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
219 	"rootfs=/dev/mtdblock5\0"					\
220 	"rootfs_fallback=/dev/mtdblock7\0"				\
221 	"setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
222 		"root=${rootfs} rootfstype=jffs2 panic=7 "		\
223 		"at91sam9_wdt.wdt_timeout=16\0"				\
224 	"stderr=serial\0"						\
225 	"stdin=serial\0"						\
226 	"stdout=serial\0"						\
227 	"upgrade_available=0\0"
228 #endif
229 
230 #if defined(CONFIG_BOARD_TAURUS)
231 #define CONFIG_BOOTARGS		CONFIG_BOOTARGS_TAURUS
232 #endif
233 
234 #if defined(CONFIG_BOARD_AXM)
235 #define CONFIG_BOOTARGS		CONFIG_BOOTARGS_AXM
236 #endif
237 
238 #define CONFIG_SYS_CBSIZE		256
239 #define CONFIG_SYS_MAXARGS		16
240 #define CONFIG_SYS_PBSIZE \
241 	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
242 #define CONFIG_SYS_LONGHELP
243 #define CONFIG_CMDLINE_EDITING
244 #define CONFIG_AUTO_COMPLETE
245 
246 /*
247  * Size of malloc() pool
248  */
249 #define CONFIG_SYS_MALLOC_LEN \
250 	ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
251 
252 /* Defines for SPL */
253 #define CONFIG_SPL_FRAMEWORK
254 #define CONFIG_SPL_TEXT_BASE		0x0
255 #define CONFIG_SPL_MAX_SIZE		(31 * SZ_512)
256 #define	CONFIG_SPL_STACK		(ATMEL_BASE_SRAM1 + SZ_16K)
257 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SYS_TEXT_BASE - \
258 					CONFIG_SYS_MALLOC_LEN)
259 #define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN
260 
261 #define CONFIG_SPL_BSS_START_ADDR	CONFIG_SPL_MAX_SIZE
262 #define CONFIG_SPL_BSS_MAX_SIZE		(3 * SZ_512)
263 
264 #define CONFIG_SPL_LIBCOMMON_SUPPORT
265 #define CONFIG_SPL_LIBGENERIC_SUPPORT
266 #define CONFIG_SPL_SERIAL_SUPPORT
267 
268 #define CONFIG_SPL_BOARD_INIT
269 #define CONFIG_SPL_GPIO_SUPPORT
270 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL	(2*32 + 14)
271 #define CONFIG_SPL_NAND_SUPPORT
272 #define CONFIG_SYS_USE_NANDFLASH	1
273 #define CONFIG_SPL_NAND_DRIVERS
274 #define CONFIG_SPL_NAND_BASE
275 #define CONFIG_SPL_NAND_ECC
276 #define CONFIG_SPL_NAND_RAW_ONLY
277 #define CONFIG_SPL_NAND_SOFTECC
278 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x20000
279 #define CONFIG_SYS_NAND_U_BOOT_SIZE	SZ_512K
280 #define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
281 #define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
282 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
283 
284 #define CONFIG_SYS_NAND_SIZE		(256 * SZ_1M)
285 #define CONFIG_SYS_NAND_PAGE_SIZE	SZ_2K
286 #define CONFIG_SYS_NAND_BLOCK_SIZE	(SZ_128K)
287 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
288 					 CONFIG_SYS_NAND_PAGE_SIZE)
289 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
290 #define CONFIG_SYS_NAND_ECCSIZE		256
291 #define CONFIG_SYS_NAND_ECCBYTES	3
292 #define CONFIG_SYS_NAND_OOBSIZE		64
293 #define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
294 					  48, 49, 50, 51, 52, 53, 54, 55, \
295 					  56, 57, 58, 59, 60, 61, 62, 63, }
296 
297 #define CONFIG_SPL_ATMEL_SIZE
298 #define CONFIG_SYS_MASTER_CLOCK		132096000
299 #define AT91_PLL_LOCK_TIMEOUT		1000000
300 #define CONFIG_SYS_AT91_PLLA		0x202A3F01
301 #define CONFIG_SYS_MCKR			0x1300
302 #define CONFIG_SYS_MCKR_CSS		(0x02 | CONFIG_SYS_MCKR)
303 #define CONFIG_SYS_AT91_PLLB		0x10193F05
304 
305 #endif
306