1 /* 2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards 3 * (C) Copyright 2013 Siemens AG 4 * 5 * Based on: 6 * U-Boot file: include/configs/at91sam9260ek.h 7 * 8 * (C) Copyright 2007-2008 9 * Stelian Pop <stelian@popies.net> 10 * Lead Tech Design <www.leadtechdesign.com> 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 #include <linux/sizes.h> 24 25 #if defined(CONFIG_SPL_BUILD) 26 #define CONFIG_SYS_THUMB_BUILD 27 #define CONFIG_SYS_ICACHE_OFF 28 #define CONFIG_SYS_DCACHE_OFF 29 #endif 30 /* 31 * Warning: changing CONFIG_SYS_TEXT_BASE requires 32 * adapting the initial boot program. 33 * Since the linker has to swallow that define, we must use a pure 34 * hex number here! 35 */ 36 37 #define CONFIG_SYS_TEXT_BASE 0x21000000 38 39 /* ARM asynchronous clock */ 40 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 41 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ 42 43 /* Misc CPU related */ 44 #define CONFIG_ARCH_CPU_INIT 45 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 46 #define CONFIG_SETUP_MEMORY_TAGS 47 #define CONFIG_INITRD_TAG 48 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY 49 50 /* general purpose I/O */ 51 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 52 #define CONFIG_AT91_GPIO 53 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 54 55 /* serial console */ 56 #define CONFIG_ATMEL_USART 57 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 58 #define CONFIG_USART_ID ATMEL_ID_SYS 59 #define CONFIG_BAUDRATE 115200 60 61 62 /* 63 * Command line configuration. 64 */ 65 #define CONFIG_CMD_NAND 66 67 /* 68 * SDRAM: 1 bank, min 32, max 128 MB 69 * Initialized before u-boot gets started. 70 */ 71 #define CONFIG_NR_DRAM_BANKS 1 72 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 73 #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) 74 75 /* 76 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 77 * leaving the correct space for initial global data structure above 78 * that address while providing maximum stack area below. 79 */ 80 #define CONFIG_SYS_INIT_SP_ADDR \ 81 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 82 83 /* NAND flash */ 84 #ifdef CONFIG_CMD_NAND 85 #define CONFIG_NAND_ATMEL 86 #define CONFIG_SYS_MAX_NAND_DEVICE 1 87 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 88 #define CONFIG_SYS_NAND_DBW_8 89 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 90 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 91 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 92 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 93 #endif 94 95 /* NOR flash - no real flash on this board */ 96 #define CONFIG_SYS_NO_FLASH 1 97 98 /* Ethernet */ 99 #define CONFIG_MACB 100 #define CONFIG_PHYLIB 101 #define CONFIG_RMII 102 #define CONFIG_AT91_WANTS_COMMON_PHY 103 104 #define CONFIG_AT91SAM9_WATCHDOG 105 #define CONFIG_AT91_HW_WDT_TIMEOUT 15 106 #if !defined(CONFIG_SPL_BUILD) 107 /* Enable the watchdog */ 108 #define CONFIG_HW_WATCHDOG 109 #endif 110 111 /* USB */ 112 #if defined(CONFIG_BOARD_TAURUS) 113 #define CONFIG_USB_ATMEL 114 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 115 #define CONFIG_USB_OHCI_NEW 116 #define CONFIG_SYS_USB_OHCI_CPU_INIT 117 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 118 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 119 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 120 121 /* USB DFU support */ 122 #define CONFIG_CMD_MTDPARTS 123 #define CONFIG_MTD_DEVICE 124 #define CONFIG_MTD_PARTITIONS 125 126 #define CONFIG_USB_GADGET_AT91 127 128 /* DFU class support */ 129 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) 130 #define DFU_MANIFEST_POLL_TIMEOUT 25000 131 #endif 132 133 /* SPI EEPROM */ 134 #define CONFIG_SPI 135 #define CONFIG_ATMEL_SPI 136 #define TAURUS_SPI_MASK (1 << 4) 137 #define TAURUS_SPI_CS_PIN AT91_PIN_PA3 138 139 #if defined(CONFIG_SPL_BUILD) 140 /* SPL related */ 141 #define CONFIG_SPL_SPI_LOAD 142 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 143 144 #define CONFIG_SF_DEFAULT_BUS 0 145 #define CONFIG_SF_DEFAULT_SPEED 1000000 146 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 147 #endif 148 149 /* load address */ 150 #define CONFIG_SYS_LOAD_ADDR 0x22000000 151 152 /* bootstrap in spi flash , u-boot + env + linux in nandflash */ 153 #define CONFIG_ENV_IS_IN_NAND 154 #define CONFIG_ENV_OFFSET 0x100000 155 #define CONFIG_ENV_OFFSET_REDUND 0x180000 156 #define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */ 157 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" 158 159 #if defined(CONFIG_BOARD_TAURUS) 160 #define CONFIG_BOOTARGS_TAURUS \ 161 "console=ttyS0,115200 earlyprintk " \ 162 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 163 "256k(env),256k(env_redundant),256k(spare)," \ 164 "512k(dtb),6M(kernel)ro,-(rootfs) " \ 165 "root=/dev/mtdblock7 rw rootfstype=jffs2" 166 #endif 167 168 #if defined(CONFIG_BOARD_AXM) 169 #define CONFIG_BOOTARGS_AXM \ 170 "\0" \ 171 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \ 172 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \ 173 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \ 174 "baudrate=115200\0" \ 175 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \ 176 "boot_retries=0\0" \ 177 "bootcmd=run flash_self\0" \ 178 "bootdelay=3\0" \ 179 "ethact=macb0\0" \ 180 "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\ 181 "bootm ${kernel_ram};reset\0" \ 182 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \ 183 "bootm ${kernel_ram};reset\0" \ 184 "flash_self_test=run nand_kernel;run setbootargs addtest; " \ 185 "upgrade_available;bootm ${kernel_ram};reset\0" \ 186 "hostname=systemone\0" \ 187 "kernel_Off=0x00200000\0" \ 188 "kernel_Off_fallback=0x03800000\0" \ 189 "kernel_ram=0x21500000\0" \ 190 "kernel_size=0x00400000\0" \ 191 "kernel_size_fallback=0x00400000\0" \ 192 "loads_echo=1\0" \ 193 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \ 194 "${kernel_size}\0" \ 195 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \ 196 "run nfsargs;run addip;upgrade_available;bootm " \ 197 "${kernel_ram};reset\0" \ 198 "netdev=eth0\0" \ 199 "nfsargs=run root_path;setenv bootargs ${bootargs} " \ 200 "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \ 201 "at91sam9_wdt.wdt_timeout=16\0" \ 202 "partitionset_active=A\0" \ 203 "preboot=echo;echo Type 'run flash_self' to use kernel and root "\ 204 "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \ 205 "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\ 206 "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\ 207 "project_dir=systemone\0" \ 208 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\ 209 "rootfs=/dev/mtdblock5\0" \ 210 "rootfs_fallback=/dev/mtdblock7\0" \ 211 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\ 212 "root=${rootfs} rootfstype=jffs2 panic=7 " \ 213 "at91sam9_wdt.wdt_timeout=16\0" \ 214 "stderr=serial\0" \ 215 "stdin=serial\0" \ 216 "stdout=serial\0" \ 217 "upgrade_available=0\0" 218 #endif 219 220 #if defined(CONFIG_BOARD_TAURUS) 221 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS 222 #endif 223 224 #if defined(CONFIG_BOARD_AXM) 225 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM 226 #endif 227 228 #define CONFIG_SYS_CBSIZE 256 229 #define CONFIG_SYS_MAXARGS 16 230 #define CONFIG_SYS_PBSIZE \ 231 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 232 #define CONFIG_SYS_LONGHELP 233 #define CONFIG_CMDLINE_EDITING 234 #define CONFIG_AUTO_COMPLETE 235 236 /* 237 * Size of malloc() pool 238 */ 239 #define CONFIG_SYS_MALLOC_LEN \ 240 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000) 241 242 /* Defines for SPL */ 243 #define CONFIG_SPL_FRAMEWORK 244 #define CONFIG_SPL_TEXT_BASE 0x0 245 #define CONFIG_SPL_MAX_SIZE (31 * SZ_512) 246 #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K) 247 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ 248 CONFIG_SYS_MALLOC_LEN) 249 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN 250 251 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE 252 #define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512) 253 254 #define CONFIG_SPL_BOARD_INIT 255 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) 256 #define CONFIG_SYS_USE_NANDFLASH 1 257 #define CONFIG_SPL_NAND_DRIVERS 258 #define CONFIG_SPL_NAND_BASE 259 #define CONFIG_SPL_NAND_ECC 260 #define CONFIG_SPL_NAND_RAW_ONLY 261 #define CONFIG_SPL_NAND_SOFTECC 262 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 263 #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K 264 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 265 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 266 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 267 268 #define CONFIG_SYS_NAND_SIZE (256 * SZ_1M) 269 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K 270 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) 271 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 272 CONFIG_SYS_NAND_PAGE_SIZE) 273 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 274 #define CONFIG_SYS_NAND_ECCSIZE 256 275 #define CONFIG_SYS_NAND_ECCBYTES 3 276 #define CONFIG_SYS_NAND_OOBSIZE 64 277 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 278 48, 49, 50, 51, 52, 53, 54, 55, \ 279 56, 57, 58, 59, 60, 61, 62, 63, } 280 281 #define CONFIG_SPL_ATMEL_SIZE 282 #define CONFIG_SYS_MASTER_CLOCK 132096000 283 #define AT91_PLL_LOCK_TIMEOUT 1000000 284 #define CONFIG_SYS_AT91_PLLA 0x202A3F01 285 #define CONFIG_SYS_MCKR 0x1300 286 #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) 287 #define CONFIG_SYS_AT91_PLLB 0x10193F05 288 289 #endif 290