xref: /openbmc/u-boot/include/configs/taurus.h (revision 89f5eaa1)
1 /*
2  * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
3  * (C) Copyright 2013 Siemens AG
4  *
5  * Based on:
6  * U-Boot file: include/configs/at91sam9260ek.h
7  *
8  * (C) Copyright 2007-2008
9  * Stelian Pop <stelian@popies.net>
10  * Lead Tech Design <www.leadtechdesign.com>
11  *
12  * SPDX-License-Identifier:	GPL-2.0+
13  */
14 
15 #ifndef __CONFIG_H
16 #define __CONFIG_H
17 
18 /*
19  * SoC must be defined first, before hardware.h is included.
20  * In this case SoC is defined in boards.cfg.
21  */
22 #include <asm/hardware.h>
23 #include <linux/sizes.h>
24 
25 #if defined(CONFIG_SPL_BUILD)
26 #define CONFIG_SYS_ICACHE_OFF
27 #define CONFIG_SYS_DCACHE_OFF
28 #endif
29 /*
30  * Warning: changing CONFIG_SYS_TEXT_BASE requires
31  * adapting the initial boot program.
32  * Since the linker has to swallow that define, we must use a pure
33  * hex number here!
34  */
35 
36 #define CONFIG_SYS_TEXT_BASE		0x21000000
37 
38 /* ARM asynchronous clock */
39 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
40 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* main clock xtal */
41 
42 /* Misc CPU related */
43 #define CONFIG_ARCH_CPU_INIT
44 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
45 #define CONFIG_SETUP_MEMORY_TAGS
46 #define CONFIG_INITRD_TAG
47 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
48 
49 /* general purpose I/O */
50 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
51 #define CONFIG_AT91_GPIO
52 #define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
53 
54 /* serial console */
55 #define CONFIG_ATMEL_USART
56 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
57 #define CONFIG_USART_ID			ATMEL_ID_SYS
58 
59 
60 /*
61  * Command line configuration.
62  */
63 #define CONFIG_CMD_NAND
64 
65 /*
66  * SDRAM: 1 bank, min 32, max 128 MB
67  * Initialized before u-boot gets started.
68  */
69 #define CONFIG_NR_DRAM_BANKS		1
70 #define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
71 #define CONFIG_SYS_SDRAM_SIZE		(128 * SZ_1M)
72 
73 /*
74  * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
75  * leaving the correct space for initial global data structure above
76  * that address while providing maximum stack area below.
77  */
78 #define CONFIG_SYS_INIT_SP_ADDR \
79 	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
80 
81 /* NAND flash */
82 #ifdef CONFIG_CMD_NAND
83 #define CONFIG_NAND_ATMEL
84 #define CONFIG_SYS_MAX_NAND_DEVICE	1
85 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
86 #define CONFIG_SYS_NAND_DBW_8
87 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
88 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
89 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
90 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
91 #endif
92 
93 /* Ethernet */
94 #define CONFIG_MACB
95 #define CONFIG_PHYLIB
96 #define CONFIG_RMII
97 #define CONFIG_AT91_WANTS_COMMON_PHY
98 
99 #define CONFIG_AT91SAM9_WATCHDOG
100 #define CONFIG_AT91_HW_WDT_TIMEOUT	15
101 #if !defined(CONFIG_SPL_BUILD)
102 /* Enable the watchdog */
103 #define CONFIG_HW_WATCHDOG
104 #endif
105 
106 /* USB */
107 #if defined(CONFIG_BOARD_TAURUS)
108 #define CONFIG_USB_ATMEL
109 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
110 #define CONFIG_USB_OHCI_NEW
111 #define CONFIG_SYS_USB_OHCI_CPU_INIT
112 #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000
113 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9260"
114 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
115 
116 /* USB DFU support */
117 #define CONFIG_CMD_MTDPARTS
118 #define CONFIG_MTD_DEVICE
119 #define CONFIG_MTD_PARTITIONS
120 
121 #define CONFIG_USB_GADGET_AT91
122 
123 /* DFU class support */
124 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	(SZ_1M)
125 #define DFU_MANIFEST_POLL_TIMEOUT	25000
126 #endif
127 
128 /* SPI EEPROM */
129 #define CONFIG_SPI
130 #define CONFIG_ATMEL_SPI
131 #define TAURUS_SPI_MASK (1 << 4)
132 #define TAURUS_SPI_CS_PIN	AT91_PIN_PA3
133 
134 #if defined(CONFIG_SPL_BUILD)
135 /* SPL related */
136 #define CONFIG_SPL_SPI_LOAD
137 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
138 
139 #define CONFIG_SF_DEFAULT_BUS 0
140 #define CONFIG_SF_DEFAULT_SPEED 1000000
141 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
142 #endif
143 
144 /* load address */
145 #define CONFIG_SYS_LOAD_ADDR			0x22000000
146 
147 /* bootstrap in spi flash , u-boot + env + linux in nandflash */
148 #define CONFIG_ENV_IS_IN_NAND
149 #define CONFIG_ENV_OFFSET		0x100000
150 #define CONFIG_ENV_OFFSET_REDUND	0x180000
151 #define CONFIG_ENV_SIZE		(SZ_128K)	/* 1 sector = 128 kB */
152 #define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0x200000 0x300000; bootm"
153 
154 #if defined(CONFIG_BOARD_TAURUS)
155 #define	CONFIG_BOOTARGS_TAURUS						\
156 	"console=ttyS0,115200 earlyprintk "				\
157 	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
158 	"256k(env),256k(env_redundant),256k(spare),"			\
159 	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
160 	"root=/dev/mtdblock7 rw rootfstype=jffs2"
161 #endif
162 
163 #if defined(CONFIG_BOARD_AXM)
164 #define CONFIG_BOOTARGS_AXM						\
165 	"\0"	\
166 	"addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:"	\
167 	"${gatewayip}:${netmask}:${hostname}:${netdev}::off\0"		\
168 	"addtest=setenv bootargs ${bootargs} loglevel=4 test\0"		\
169 	"baudrate=115200\0"						\
170 	"boot_file=setenv bootfile /${project_dir}/kernel/uImage\0"	\
171 	"boot_retries=0\0"						\
172 	"bootcmd=run flash_self\0"					\
173 	"bootdelay=3\0"							\
174 	"ethact=macb0\0"						\
175 	"flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
176 	"bootm ${kernel_ram};reset\0"					\
177 	"flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
178 	"bootm ${kernel_ram};reset\0"					\
179 	"flash_self_test=run nand_kernel;run setbootargs addtest; "	\
180 	"upgrade_available;bootm ${kernel_ram};reset\0"			\
181 	"hostname=systemone\0"						\
182 	"kernel_Off=0x00200000\0"					\
183 	"kernel_Off_fallback=0x03800000\0"				\
184 	"kernel_ram=0x21500000\0"					\
185 	"kernel_size=0x00400000\0"					\
186 	"kernel_size_fallback=0x00400000\0"				\
187 	"loads_echo=1\0"						\
188 	"nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} "		\
189 		"${kernel_size}\0"					\
190 	"net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};"		\
191 	"run nfsargs;run addip;upgrade_available;bootm "		\
192 		"${kernel_ram};reset\0"					\
193 	"netdev=eth0\0"							\
194 	"nfsargs=run root_path;setenv bootargs ${bootargs} "		\
195 	"root=/dev/nfs rw nfsroot=${serverip}:${rootpath} "		\
196 	"at91sam9_wdt.wdt_timeout=16\0"					\
197 	"partitionset_active=A\0"					\
198 	"preboot=echo;echo Type 'run flash_self' to use kernel and root "\
199 	"filesystem on memory;echo Type 'run flash_nfs' to use kernel "	\
200 	"from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
201 	"to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
202 	"project_dir=systemone\0"					\
203 	"root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
204 	"rootfs=/dev/mtdblock5\0"					\
205 	"rootfs_fallback=/dev/mtdblock7\0"				\
206 	"setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
207 		"root=${rootfs} rootfstype=jffs2 panic=7 "		\
208 		"at91sam9_wdt.wdt_timeout=16\0"				\
209 	"stderr=serial\0"						\
210 	"stdin=serial\0"						\
211 	"stdout=serial\0"						\
212 	"upgrade_available=0\0"
213 #endif
214 
215 #if defined(CONFIG_BOARD_TAURUS)
216 #define CONFIG_BOOTARGS		CONFIG_BOOTARGS_TAURUS
217 #endif
218 
219 #if defined(CONFIG_BOARD_AXM)
220 #define CONFIG_BOOTARGS		CONFIG_BOOTARGS_AXM
221 #endif
222 
223 #define CONFIG_SYS_CBSIZE		256
224 #define CONFIG_SYS_MAXARGS		16
225 #define CONFIG_SYS_PBSIZE \
226 	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
227 #define CONFIG_SYS_LONGHELP
228 #define CONFIG_CMDLINE_EDITING
229 #define CONFIG_AUTO_COMPLETE
230 
231 /*
232  * Size of malloc() pool
233  */
234 #define CONFIG_SYS_MALLOC_LEN \
235 	ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
236 
237 /* Defines for SPL */
238 #define CONFIG_SPL_FRAMEWORK
239 #define CONFIG_SPL_TEXT_BASE		0x0
240 #define CONFIG_SPL_MAX_SIZE		(31 * SZ_512)
241 #define	CONFIG_SPL_STACK		(ATMEL_BASE_SRAM1 + SZ_16K)
242 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SYS_TEXT_BASE - \
243 					CONFIG_SYS_MALLOC_LEN)
244 #define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN
245 
246 #define CONFIG_SPL_BSS_START_ADDR	CONFIG_SPL_MAX_SIZE
247 #define CONFIG_SPL_BSS_MAX_SIZE		(3 * SZ_512)
248 
249 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL	(2*32 + 14)
250 #define CONFIG_SYS_USE_NANDFLASH	1
251 #define CONFIG_SPL_NAND_DRIVERS
252 #define CONFIG_SPL_NAND_BASE
253 #define CONFIG_SPL_NAND_ECC
254 #define CONFIG_SPL_NAND_RAW_ONLY
255 #define CONFIG_SPL_NAND_SOFTECC
256 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x20000
257 #define CONFIG_SYS_NAND_U_BOOT_SIZE	SZ_512K
258 #define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
259 #define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
260 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
261 
262 #define CONFIG_SYS_NAND_SIZE		(256 * SZ_1M)
263 #define CONFIG_SYS_NAND_PAGE_SIZE	SZ_2K
264 #define CONFIG_SYS_NAND_BLOCK_SIZE	(SZ_128K)
265 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
266 					 CONFIG_SYS_NAND_PAGE_SIZE)
267 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
268 #define CONFIG_SYS_NAND_ECCSIZE		256
269 #define CONFIG_SYS_NAND_ECCBYTES	3
270 #define CONFIG_SYS_NAND_OOBSIZE		64
271 #define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
272 					  48, 49, 50, 51, 52, 53, 54, 55, \
273 					  56, 57, 58, 59, 60, 61, 62, 63, }
274 
275 #define CONFIG_SPL_ATMEL_SIZE
276 #define CONFIG_SYS_MASTER_CLOCK		132096000
277 #define AT91_PLL_LOCK_TIMEOUT		1000000
278 #define CONFIG_SYS_AT91_PLLA		0x202A3F01
279 #define CONFIG_SYS_MCKR			0x1300
280 #define CONFIG_SYS_MCKR_CSS		(0x02 | CONFIG_SYS_MCKR)
281 #define CONFIG_SYS_AT91_PLLB		0x10193F05
282 
283 #endif
284