1 /* 2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards 3 * (C) Copyright 2013 Siemens AG 4 * 5 * Based on: 6 * U-Boot file: include/configs/at91sam9260ek.h 7 * 8 * (C) Copyright 2007-2008 9 * Stelian Pop <stelian@popies.net> 10 * Lead Tech Design <www.leadtechdesign.com> 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 #include <linux/sizes.h> 24 25 #define CONFIG_SYS_GENERIC_BOARD 26 27 #if defined(CONFIG_SPL_BUILD) 28 #define CONFIG_SYS_THUMB_BUILD 29 #define CONFIG_SYS_ICACHE_OFF 30 #define CONFIG_SYS_DCACHE_OFF 31 #endif 32 /* 33 * Warning: changing CONFIG_SYS_TEXT_BASE requires 34 * adapting the initial boot program. 35 * Since the linker has to swallow that define, we must use a pure 36 * hex number here! 37 */ 38 39 40 #define CONFIG_SYS_TEXT_BASE 0x21000000 41 42 /* ARM asynchronous clock */ 43 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 44 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ 45 46 /* Misc CPU related */ 47 #define CONFIG_ARCH_CPU_INIT 48 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 49 #define CONFIG_SETUP_MEMORY_TAGS 50 #define CONFIG_INITRD_TAG 51 #define CONFIG_SKIP_LOWLEVEL_INIT 52 #define CONFIG_BOARD_EARLY_INIT_F 53 #define CONFIG_DISPLAY_CPUINFO 54 55 #define CONFIG_CMD_BOOTZ 56 #define CONFIG_OF_LIBFDT 57 58 /* general purpose I/O */ 59 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 60 #define CONFIG_AT91_GPIO 61 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 62 63 /* serial console */ 64 #define CONFIG_ATMEL_USART 65 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 66 #define CONFIG_USART_ID ATMEL_ID_SYS 67 #define CONFIG_BAUDRATE 115200 68 69 #define CONFIG_BOOTDELAY 3 70 71 /* 72 * Command line configuration. 73 */ 74 #define CONFIG_CMD_PING 75 #define CONFIG_CMD_DHCP 76 #define CONFIG_CMD_NAND 77 78 /* 79 * SDRAM: 1 bank, min 32, max 128 MB 80 * Initialized before u-boot gets started. 81 */ 82 #define CONFIG_NR_DRAM_BANKS 1 83 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 84 #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) 85 86 /* 87 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 88 * leaving the correct space for initial global data structure above 89 * that address while providing maximum stack area below. 90 */ 91 #define CONFIG_SYS_INIT_SP_ADDR \ 92 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 93 94 /* NAND flash */ 95 #ifdef CONFIG_CMD_NAND 96 #define CONFIG_NAND_ATMEL 97 #define CONFIG_SYS_MAX_NAND_DEVICE 1 98 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 99 #define CONFIG_SYS_NAND_DBW_8 100 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 101 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 102 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 103 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 104 #endif 105 106 /* NOR flash - no real flash on this board */ 107 #define CONFIG_SYS_NO_FLASH 1 108 109 /* Ethernet */ 110 #define CONFIG_MACB 111 #define CONFIG_RMII 112 #define CONFIG_AT91_WANTS_COMMON_PHY 113 114 #define CONFIG_AT91SAM9_WATCHDOG 115 #define CONFIG_AT91_HW_WDT_TIMEOUT 15 116 #if !defined(CONFIG_SPL_BUILD) 117 /* Enable the watchdog */ 118 #define CONFIG_HW_WATCHDOG 119 #endif 120 121 /* USB */ 122 #if defined(CONFIG_BOARD_TAURUS) 123 #define CONFIG_USB_ATMEL 124 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 125 #define CONFIG_USB_OHCI_NEW 126 #define CONFIG_SYS_USB_OHCI_CPU_INIT 127 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 128 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 129 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 130 #define CONFIG_USB_STORAGE 131 132 /* USB DFU support */ 133 #define CONFIG_CMD_MTDPARTS 134 #define CONFIG_MTD_DEVICE 135 #define CONFIG_MTD_PARTITIONS 136 137 #define CONFIG_USB_GADGET 138 #define CONFIG_USB_GADGET_AT91 139 140 /* DFU class support */ 141 #define CONFIG_CMD_USB 142 #define CONFIG_CMD_DFU 143 #define CONFIG_USB_FUNCTION_DFU 144 #define CONFIG_DFU_NAND 145 #define CONFIG_USB_GADGET_DOWNLOAD 146 #define CONFIG_USB_GADGET_VBUS_DRAW 2 147 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) 148 #define DFU_MANIFEST_POLL_TIMEOUT 25000 149 150 /* USB DFU IDs */ 151 #define CONFIG_G_DNL_VENDOR_NUM 0x0908 152 #define CONFIG_G_DNL_PRODUCT_NUM 0x02d2 153 #define CONFIG_G_DNL_MANUFACTURER "Siemens AG" 154 155 #define CONFIG_SYS_CACHELINE_SIZE SZ_8K 156 #endif 157 158 /* SPI EEPROM */ 159 #define CONFIG_SPI 160 #define CONFIG_CMD_SPI 161 #define CONFIG_CMD_SF 162 #define CONFIG_ATMEL_SPI 163 #define CONFIG_SPI_FLASH_STMICRO 164 #define TAURUS_SPI_MASK (1 << 4) 165 #define TAURUS_SPI_CS_PIN AT91_PIN_PA3 166 167 #if defined(CONFIG_SPL_BUILD) 168 /* SPL related */ 169 #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ 170 #define CONFIG_SPL_SPI_SUPPORT 171 #define CONFIG_SPL_SPI_FLASH_SUPPORT 172 #define CONFIG_SPL_SPI_LOAD 173 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 174 175 #define CONFIG_SF_DEFAULT_BUS 0 176 #define CONFIG_SF_DEFAULT_SPEED 1000000 177 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 178 #endif 179 180 /* load address */ 181 #define CONFIG_SYS_LOAD_ADDR 0x22000000 182 183 /* bootstrap in spi flash , u-boot + env + linux in nandflash */ 184 #define CONFIG_ENV_IS_IN_NAND 185 #define CONFIG_ENV_OFFSET 0x100000 186 #define CONFIG_ENV_OFFSET_REDUND 0x180000 187 #define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */ 188 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" 189 190 #if defined(CONFIG_BOARD_TAURUS) 191 #define CONFIG_BOOTARGS_TAURUS \ 192 "console=ttyS0,115200 earlyprintk " \ 193 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 194 "256k(env),256k(env_redundant),256k(spare)," \ 195 "512k(dtb),6M(kernel)ro,-(rootfs) " \ 196 "root=/dev/mtdblock7 rw rootfstype=jffs2" 197 #endif 198 199 #if defined(CONFIG_BOARD_AXM) 200 #define CONFIG_BOOTARGS_AXM \ 201 "\0" \ 202 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \ 203 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \ 204 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \ 205 "baudrate=115200\0" \ 206 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \ 207 "boot_retries=0\0" \ 208 "bootcmd=run flash_self\0" \ 209 "bootdelay=3\0" \ 210 "ethact=macb0\0" \ 211 "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\ 212 "bootm ${kernel_ram};reset\0" \ 213 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \ 214 "bootm ${kernel_ram};reset\0" \ 215 "flash_self_test=run nand_kernel;run setbootargs addtest; " \ 216 "upgrade_available;bootm ${kernel_ram};reset\0" \ 217 "hostname=systemone\0" \ 218 "kernel_Off=0x00200000\0" \ 219 "kernel_Off_fallback=0x03800000\0" \ 220 "kernel_ram=0x21500000\0" \ 221 "kernel_size=0x00400000\0" \ 222 "kernel_size_fallback=0x00400000\0" \ 223 "loads_echo=1\0" \ 224 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \ 225 "${kernel_size}\0" \ 226 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \ 227 "run nfsargs;run addip;upgrade_available;bootm " \ 228 "${kernel_ram};reset\0" \ 229 "netdev=eth0\0" \ 230 "nfsargs=run root_path;setenv bootargs ${bootargs} " \ 231 "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \ 232 "at91sam9_wdt.wdt_timeout=16\0" \ 233 "partitionset_active=A\0" \ 234 "preboot=echo;echo Type 'run flash_self' to use kernel and root "\ 235 "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \ 236 "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\ 237 "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\ 238 "project_dir=systemone\0" \ 239 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\ 240 "rootfs=/dev/mtdblock5\0" \ 241 "rootfs_fallback=/dev/mtdblock7\0" \ 242 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\ 243 "root=${rootfs} rootfstype=jffs2 panic=7 " \ 244 "at91sam9_wdt.wdt_timeout=16\0" \ 245 "stderr=serial\0" \ 246 "stdin=serial\0" \ 247 "stdout=serial\0" \ 248 "upgrade_available=0\0" 249 #endif 250 251 #if defined(CONFIG_BOARD_TAURUS) 252 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS 253 #endif 254 255 #if defined(CONFIG_BOARD_AXM) 256 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM 257 #endif 258 259 #define CONFIG_SYS_CBSIZE 256 260 #define CONFIG_SYS_MAXARGS 16 261 #define CONFIG_SYS_PBSIZE \ 262 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 263 #define CONFIG_SYS_LONGHELP 264 #define CONFIG_CMDLINE_EDITING 265 #define CONFIG_AUTO_COMPLETE 266 267 /* 268 * Size of malloc() pool 269 */ 270 #define CONFIG_SYS_MALLOC_LEN \ 271 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000) 272 273 /* Defines for SPL */ 274 #define CONFIG_SPL_FRAMEWORK 275 #define CONFIG_SPL_TEXT_BASE 0x0 276 #define CONFIG_SPL_MAX_SIZE (31 * SZ_512) 277 #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K) 278 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ 279 CONFIG_SYS_MALLOC_LEN) 280 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN 281 282 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE 283 #define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512) 284 285 #define CONFIG_SPL_LIBCOMMON_SUPPORT 286 #define CONFIG_SPL_LIBGENERIC_SUPPORT 287 #define CONFIG_SPL_SERIAL_SUPPORT 288 289 #define CONFIG_SPL_BOARD_INIT 290 #define CONFIG_SPL_GPIO_SUPPORT 291 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) 292 #define CONFIG_SPL_NAND_SUPPORT 293 #define CONFIG_SYS_USE_NANDFLASH 1 294 #define CONFIG_SPL_NAND_DRIVERS 295 #define CONFIG_SPL_NAND_BASE 296 #define CONFIG_SPL_NAND_ECC 297 #define CONFIG_SPL_NAND_RAW_ONLY 298 #define CONFIG_SPL_NAND_SOFTECC 299 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 300 #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K 301 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 302 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 303 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 304 305 #define CONFIG_SYS_NAND_SIZE (256 * SZ_1M) 306 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K 307 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) 308 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 309 CONFIG_SYS_NAND_PAGE_SIZE) 310 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 311 #define CONFIG_SYS_NAND_ECCSIZE 256 312 #define CONFIG_SYS_NAND_ECCBYTES 3 313 #define CONFIG_SYS_NAND_OOBSIZE 64 314 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 315 48, 49, 50, 51, 52, 53, 54, 55, \ 316 56, 57, 58, 59, 60, 61, 62, 63, } 317 318 319 #define CONFIG_SPL_ATMEL_SIZE 320 #define CONFIG_SYS_MASTER_CLOCK 132096000 321 #define AT91_PLL_LOCK_TIMEOUT 1000000 322 #define CONFIG_SYS_AT91_PLLA 0x202A3F01 323 #define CONFIG_SYS_MCKR 0x1300 324 #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) 325 #define CONFIG_SYS_AT91_PLLB 0x10193F05 326 327 #endif 328