1 /* 2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards 3 * (C) Copyright 2013 Siemens AG 4 * 5 * Based on: 6 * U-Boot file: include/configs/at91sam9260ek.h 7 * 8 * (C) Copyright 2007-2008 9 * Stelian Pop <stelian@popies.net> 10 * Lead Tech Design <www.leadtechdesign.com> 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 #include <linux/sizes.h> 24 25 #if defined(CONFIG_SPL_BUILD) 26 #define CONFIG_SYS_THUMB_BUILD 27 #define CONFIG_SYS_ICACHE_OFF 28 #define CONFIG_SYS_DCACHE_OFF 29 #endif 30 /* 31 * Warning: changing CONFIG_SYS_TEXT_BASE requires 32 * adapting the initial boot program. 33 * Since the linker has to swallow that define, we must use a pure 34 * hex number here! 35 */ 36 37 #define CONFIG_SYS_TEXT_BASE 0x21000000 38 39 /* ARM asynchronous clock */ 40 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 41 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ 42 43 /* Misc CPU related */ 44 #define CONFIG_ARCH_CPU_INIT 45 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 46 #define CONFIG_SETUP_MEMORY_TAGS 47 #define CONFIG_INITRD_TAG 48 #define CONFIG_SKIP_LOWLEVEL_INIT 49 #define CONFIG_BOARD_EARLY_INIT_F 50 #define CONFIG_DISPLAY_CPUINFO 51 52 /* general purpose I/O */ 53 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 54 #define CONFIG_AT91_GPIO 55 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 56 57 /* serial console */ 58 #define CONFIG_ATMEL_USART 59 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 60 #define CONFIG_USART_ID ATMEL_ID_SYS 61 #define CONFIG_BAUDRATE 115200 62 63 64 /* 65 * Command line configuration. 66 */ 67 #define CONFIG_CMD_NAND 68 69 /* 70 * SDRAM: 1 bank, min 32, max 128 MB 71 * Initialized before u-boot gets started. 72 */ 73 #define CONFIG_NR_DRAM_BANKS 1 74 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 75 #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) 76 77 /* 78 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 79 * leaving the correct space for initial global data structure above 80 * that address while providing maximum stack area below. 81 */ 82 #define CONFIG_SYS_INIT_SP_ADDR \ 83 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 84 85 /* NAND flash */ 86 #ifdef CONFIG_CMD_NAND 87 #define CONFIG_NAND_ATMEL 88 #define CONFIG_SYS_MAX_NAND_DEVICE 1 89 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 90 #define CONFIG_SYS_NAND_DBW_8 91 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 92 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 93 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 94 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 95 #endif 96 97 /* NOR flash - no real flash on this board */ 98 #define CONFIG_SYS_NO_FLASH 1 99 100 /* Ethernet */ 101 #define CONFIG_MACB 102 #define CONFIG_RMII 103 #define CONFIG_AT91_WANTS_COMMON_PHY 104 105 #define CONFIG_AT91SAM9_WATCHDOG 106 #define CONFIG_AT91_HW_WDT_TIMEOUT 15 107 #if !defined(CONFIG_SPL_BUILD) 108 /* Enable the watchdog */ 109 #define CONFIG_HW_WATCHDOG 110 #endif 111 112 /* USB */ 113 #if defined(CONFIG_BOARD_TAURUS) 114 #define CONFIG_USB_ATMEL 115 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 116 #define CONFIG_USB_OHCI_NEW 117 #define CONFIG_SYS_USB_OHCI_CPU_INIT 118 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 119 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 120 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 121 #define CONFIG_USB_STORAGE 122 123 /* USB DFU support */ 124 #define CONFIG_CMD_MTDPARTS 125 #define CONFIG_MTD_DEVICE 126 #define CONFIG_MTD_PARTITIONS 127 128 #define CONFIG_USB_GADGET_AT91 129 130 /* DFU class support */ 131 #define CONFIG_USB_FUNCTION_DFU 132 #define CONFIG_DFU_NAND 133 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) 134 #define DFU_MANIFEST_POLL_TIMEOUT 25000 135 136 #define CONFIG_SYS_CACHELINE_SIZE SZ_8K 137 #endif 138 139 /* SPI EEPROM */ 140 #define CONFIG_SPI 141 #define CONFIG_ATMEL_SPI 142 #define TAURUS_SPI_MASK (1 << 4) 143 #define TAURUS_SPI_CS_PIN AT91_PIN_PA3 144 145 #if defined(CONFIG_SPL_BUILD) 146 /* SPL related */ 147 #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ 148 #define CONFIG_SPL_SPI_SUPPORT 149 #define CONFIG_SPL_SPI_FLASH_SUPPORT 150 #define CONFIG_SPL_SPI_LOAD 151 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 152 153 #define CONFIG_SF_DEFAULT_BUS 0 154 #define CONFIG_SF_DEFAULT_SPEED 1000000 155 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 156 #endif 157 158 /* load address */ 159 #define CONFIG_SYS_LOAD_ADDR 0x22000000 160 161 /* bootstrap in spi flash , u-boot + env + linux in nandflash */ 162 #define CONFIG_ENV_IS_IN_NAND 163 #define CONFIG_ENV_OFFSET 0x100000 164 #define CONFIG_ENV_OFFSET_REDUND 0x180000 165 #define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */ 166 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" 167 168 #if defined(CONFIG_BOARD_TAURUS) 169 #define CONFIG_BOOTARGS_TAURUS \ 170 "console=ttyS0,115200 earlyprintk " \ 171 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 172 "256k(env),256k(env_redundant),256k(spare)," \ 173 "512k(dtb),6M(kernel)ro,-(rootfs) " \ 174 "root=/dev/mtdblock7 rw rootfstype=jffs2" 175 #endif 176 177 #if defined(CONFIG_BOARD_AXM) 178 #define CONFIG_BOOTARGS_AXM \ 179 "\0" \ 180 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \ 181 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \ 182 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \ 183 "baudrate=115200\0" \ 184 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \ 185 "boot_retries=0\0" \ 186 "bootcmd=run flash_self\0" \ 187 "bootdelay=3\0" \ 188 "ethact=macb0\0" \ 189 "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\ 190 "bootm ${kernel_ram};reset\0" \ 191 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \ 192 "bootm ${kernel_ram};reset\0" \ 193 "flash_self_test=run nand_kernel;run setbootargs addtest; " \ 194 "upgrade_available;bootm ${kernel_ram};reset\0" \ 195 "hostname=systemone\0" \ 196 "kernel_Off=0x00200000\0" \ 197 "kernel_Off_fallback=0x03800000\0" \ 198 "kernel_ram=0x21500000\0" \ 199 "kernel_size=0x00400000\0" \ 200 "kernel_size_fallback=0x00400000\0" \ 201 "loads_echo=1\0" \ 202 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \ 203 "${kernel_size}\0" \ 204 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \ 205 "run nfsargs;run addip;upgrade_available;bootm " \ 206 "${kernel_ram};reset\0" \ 207 "netdev=eth0\0" \ 208 "nfsargs=run root_path;setenv bootargs ${bootargs} " \ 209 "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \ 210 "at91sam9_wdt.wdt_timeout=16\0" \ 211 "partitionset_active=A\0" \ 212 "preboot=echo;echo Type 'run flash_self' to use kernel and root "\ 213 "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \ 214 "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\ 215 "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\ 216 "project_dir=systemone\0" \ 217 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\ 218 "rootfs=/dev/mtdblock5\0" \ 219 "rootfs_fallback=/dev/mtdblock7\0" \ 220 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\ 221 "root=${rootfs} rootfstype=jffs2 panic=7 " \ 222 "at91sam9_wdt.wdt_timeout=16\0" \ 223 "stderr=serial\0" \ 224 "stdin=serial\0" \ 225 "stdout=serial\0" \ 226 "upgrade_available=0\0" 227 #endif 228 229 #if defined(CONFIG_BOARD_TAURUS) 230 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS 231 #endif 232 233 #if defined(CONFIG_BOARD_AXM) 234 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM 235 #endif 236 237 #define CONFIG_SYS_CBSIZE 256 238 #define CONFIG_SYS_MAXARGS 16 239 #define CONFIG_SYS_PBSIZE \ 240 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 241 #define CONFIG_SYS_LONGHELP 242 #define CONFIG_CMDLINE_EDITING 243 #define CONFIG_AUTO_COMPLETE 244 245 /* 246 * Size of malloc() pool 247 */ 248 #define CONFIG_SYS_MALLOC_LEN \ 249 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000) 250 251 /* Defines for SPL */ 252 #define CONFIG_SPL_FRAMEWORK 253 #define CONFIG_SPL_TEXT_BASE 0x0 254 #define CONFIG_SPL_MAX_SIZE (31 * SZ_512) 255 #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K) 256 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ 257 CONFIG_SYS_MALLOC_LEN) 258 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN 259 260 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE 261 #define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512) 262 263 #define CONFIG_SPL_LIBCOMMON_SUPPORT 264 #define CONFIG_SPL_LIBGENERIC_SUPPORT 265 #define CONFIG_SPL_SERIAL_SUPPORT 266 267 #define CONFIG_SPL_BOARD_INIT 268 #define CONFIG_SPL_GPIO_SUPPORT 269 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) 270 #define CONFIG_SPL_NAND_SUPPORT 271 #define CONFIG_SYS_USE_NANDFLASH 1 272 #define CONFIG_SPL_NAND_DRIVERS 273 #define CONFIG_SPL_NAND_BASE 274 #define CONFIG_SPL_NAND_ECC 275 #define CONFIG_SPL_NAND_RAW_ONLY 276 #define CONFIG_SPL_NAND_SOFTECC 277 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 278 #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K 279 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 280 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 281 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 282 283 #define CONFIG_SYS_NAND_SIZE (256 * SZ_1M) 284 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K 285 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) 286 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 287 CONFIG_SYS_NAND_PAGE_SIZE) 288 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 289 #define CONFIG_SYS_NAND_ECCSIZE 256 290 #define CONFIG_SYS_NAND_ECCBYTES 3 291 #define CONFIG_SYS_NAND_OOBSIZE 64 292 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 293 48, 49, 50, 51, 52, 53, 54, 55, \ 294 56, 57, 58, 59, 60, 61, 62, 63, } 295 296 #define CONFIG_SPL_ATMEL_SIZE 297 #define CONFIG_SYS_MASTER_CLOCK 132096000 298 #define AT91_PLL_LOCK_TIMEOUT 1000000 299 #define CONFIG_SYS_AT91_PLLA 0x202A3F01 300 #define CONFIG_SYS_MCKR 0x1300 301 #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) 302 #define CONFIG_SYS_AT91_PLLB 0x10193F05 303 304 #endif 305