1 /* 2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards 3 * (C) Copyright 2013 Siemens AG 4 * 5 * Based on: 6 * U-Boot file: include/configs/at91sam9260ek.h 7 * 8 * (C) Copyright 2007-2008 9 * Stelian Pop <stelian@popies.net> 10 * Lead Tech Design <www.leadtechdesign.com> 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 24 #define CONFIG_SYS_GENERIC_BOARD 25 26 #if defined(CONFIG_SPL_BUILD) 27 #define CONFIG_SYS_THUMB_BUILD 28 #define CONFIG_SYS_ICACHE_OFF 29 #define CONFIG_SYS_DCACHE_OFF 30 #endif 31 /* 32 * Warning: changing CONFIG_SYS_TEXT_BASE requires 33 * adapting the initial boot program. 34 * Since the linker has to swallow that define, we must use a pure 35 * hex number here! 36 */ 37 38 39 #define CONFIG_SYS_TEXT_BASE 0x21000000 40 41 /* ARM asynchronous clock */ 42 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 43 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ 44 45 /* Misc CPU related */ 46 #define CONFIG_ARCH_CPU_INIT 47 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 48 #define CONFIG_SETUP_MEMORY_TAGS 49 #define CONFIG_INITRD_TAG 50 #define CONFIG_SKIP_LOWLEVEL_INIT 51 #define CONFIG_BOARD_EARLY_INIT_F 52 #define CONFIG_DISPLAY_CPUINFO 53 54 #define CONFIG_CMD_BOOTZ 55 #define CONFIG_OF_LIBFDT 56 57 /* general purpose I/O */ 58 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 59 #define CONFIG_AT91_GPIO 60 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 61 62 /* serial console */ 63 #define CONFIG_ATMEL_USART 64 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 65 #define CONFIG_USART_ID ATMEL_ID_SYS 66 #define CONFIG_BAUDRATE 115200 67 68 #define CONFIG_BOOTDELAY 3 69 70 /* 71 * Command line configuration. 72 */ 73 #define CONFIG_CMD_PING 74 #define CONFIG_CMD_DHCP 75 #define CONFIG_CMD_NAND 76 77 /* 78 * SDRAM: 1 bank, min 32, max 128 MB 79 * Initialized before u-boot gets started. 80 */ 81 #define CONFIG_NR_DRAM_BANKS 1 82 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 83 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 84 85 /* 86 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 87 * leaving the correct space for initial global data structure above 88 * that address while providing maximum stack area below. 89 */ 90 # define CONFIG_SYS_INIT_SP_ADDR \ 91 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 92 93 /* NAND flash */ 94 #ifdef CONFIG_CMD_NAND 95 #define CONFIG_NAND_ATMEL 96 #define CONFIG_SYS_MAX_NAND_DEVICE 1 97 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 98 #define CONFIG_SYS_NAND_DBW_8 99 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 100 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 101 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 102 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 103 #endif 104 105 /* NOR flash - no real flash on this board */ 106 #define CONFIG_SYS_NO_FLASH 1 107 108 /* Ethernet */ 109 #define CONFIG_MACB 110 #define CONFIG_RMII 111 #define CONFIG_AT91_WANTS_COMMON_PHY 112 113 #define CONFIG_AT91SAM9_WATCHDOG 114 #if !defined(CONFIG_SPL_BUILD) 115 /* Enable the watchdog */ 116 #define CONFIG_HW_WATCHDOG 117 #endif 118 119 /* USB */ 120 #if defined(CONFIG_BOARD_TAURUS) 121 #define CONFIG_USB_ATMEL 122 #define CONFIG_USB_OHCI_NEW 123 #define CONFIG_SYS_USB_OHCI_CPU_INIT 124 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 125 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 126 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 127 #define CONFIG_USB_STORAGE 128 #endif 129 130 /* SPI EEPROM */ 131 #define CONFIG_SPI 132 #define CONFIG_CMD_SPI 133 #define CONFIG_CMD_SF 134 #define CONFIG_ATMEL_SPI 135 #define CONFIG_SPI_FLASH_STMICRO 136 #define TAURUS_SPI_MASK (1 << 4) 137 #define TAURUS_SPI_CS_PIN AT91_PIN_PA3 138 139 #if defined(CONFIG_SPL_BUILD) 140 /* SPL related */ 141 #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ 142 #define CONFIG_SPL_SPI_SUPPORT 143 #define CONFIG_SPL_SPI_FLASH_SUPPORT 144 #define CONFIG_SPL_SPI_LOAD 145 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 146 147 #define CONFIG_SF_DEFAULT_BUS 0 148 #define CONFIG_SF_DEFAULT_SPEED 10000000 149 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 150 #endif 151 152 /* load address */ 153 #define CONFIG_SYS_LOAD_ADDR 0x22000000 154 155 /* bootstrap in spi flash , u-boot + env + linux in nandflash */ 156 #define CONFIG_ENV_IS_IN_NAND 157 #define CONFIG_ENV_OFFSET 0x100000 158 #define CONFIG_ENV_OFFSET_REDUND 0x180000 159 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 160 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" 161 #define CONFIG_BOOTARGS \ 162 "console=ttyS0,115200 earlyprintk " \ 163 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 164 "256k(env),256k(env_redundant),256k(spare)," \ 165 "512k(dtb),6M(kernel)ro,-(rootfs) " \ 166 "root=/dev/mtdblock7 rw rootfstype=jffs2" 167 168 #define CONFIG_SYS_PROMPT "U-Boot> " 169 #define CONFIG_SYS_CBSIZE 256 170 #define CONFIG_SYS_MAXARGS 16 171 #define CONFIG_SYS_PBSIZE \ 172 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 173 #define CONFIG_SYS_LONGHELP 174 #define CONFIG_CMDLINE_EDITING 175 #define CONFIG_AUTO_COMPLETE 176 177 /* 178 * Size of malloc() pool 179 */ 180 #define CONFIG_SYS_MALLOC_LEN \ 181 ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 182 183 /* Defines for SPL */ 184 #define CONFIG_SPL_FRAMEWORK 185 #define CONFIG_SPL_TEXT_BASE 0x0 186 #define CONFIG_SPL_MAX_SIZE (14 * 1024) 187 #define CONFIG_SPL_STACK (16 * 1024) 188 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ 189 CONFIG_SYS_MALLOC_LEN) 190 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN 191 192 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE 193 #define CONFIG_SPL_BSS_MAX_SIZE (3 * 1024) 194 195 #define CONFIG_SPL_LIBCOMMON_SUPPORT 196 #define CONFIG_SPL_LIBGENERIC_SUPPORT 197 #define CONFIG_SPL_SERIAL_SUPPORT 198 199 #define CONFIG_SPL_BOARD_INIT 200 #define CONFIG_SPL_GPIO_SUPPORT 201 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) 202 #define CONFIG_SPL_NAND_SUPPORT 203 #define CONFIG_SYS_USE_NANDFLASH 1 204 #define CONFIG_SPL_NAND_DRIVERS 205 #define CONFIG_SPL_NAND_BASE 206 #define CONFIG_SPL_NAND_ECC 207 #define CONFIG_SPL_NAND_RAW_ONLY 208 #define CONFIG_SPL_NAND_SOFTECC 209 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 210 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 211 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 212 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 213 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 214 215 #define CONFIG_SYS_NAND_SIZE (256*1024*1024) 216 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 217 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 218 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 219 CONFIG_SYS_NAND_PAGE_SIZE) 220 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 221 #define CONFIG_SYS_NAND_ECCSIZE 256 222 #define CONFIG_SYS_NAND_ECCBYTES 3 223 #define CONFIG_SYS_NAND_OOBSIZE 64 224 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 225 48, 49, 50, 51, 52, 53, 54, 55, \ 226 56, 57, 58, 59, 60, 61, 62, 63, } 227 228 229 #define CONFIG_SPL_ATMEL_SIZE 230 #define CONFIG_SYS_MASTER_CLOCK 132096000 231 #define AT91_PLL_LOCK_TIMEOUT 1000000 232 #define CONFIG_SYS_AT91_PLLA 0x202A3F01 233 #define CONFIG_SYS_MCKR 0x1300 234 #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) 235 #define CONFIG_SYS_AT91_PLLB 0x10193F05 236 #endif 237