10f8bc283SHeiko Schocher /* 20f8bc283SHeiko Schocher * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards 30f8bc283SHeiko Schocher * (C) Copyright 2013 Siemens AG 40f8bc283SHeiko Schocher * 50f8bc283SHeiko Schocher * Based on: 60f8bc283SHeiko Schocher * U-Boot file: include/configs/at91sam9260ek.h 70f8bc283SHeiko Schocher * 80f8bc283SHeiko Schocher * (C) Copyright 2007-2008 90f8bc283SHeiko Schocher * Stelian Pop <stelian@popies.net> 100f8bc283SHeiko Schocher * Lead Tech Design <www.leadtechdesign.com> 110f8bc283SHeiko Schocher * 120f8bc283SHeiko Schocher * SPDX-License-Identifier: GPL-2.0+ 130f8bc283SHeiko Schocher */ 140f8bc283SHeiko Schocher 150f8bc283SHeiko Schocher #ifndef __CONFIG_H 160f8bc283SHeiko Schocher #define __CONFIG_H 170f8bc283SHeiko Schocher 180f8bc283SHeiko Schocher /* 190f8bc283SHeiko Schocher * SoC must be defined first, before hardware.h is included. 200f8bc283SHeiko Schocher * In this case SoC is defined in boards.cfg. 210f8bc283SHeiko Schocher */ 220f8bc283SHeiko Schocher #include <asm/hardware.h> 230f8bc283SHeiko Schocher 240f8bc283SHeiko Schocher #define MACH_TYPE_TAURUS 2067 250f8bc283SHeiko Schocher #define MACH_TYPE_AXM 2068 260f8bc283SHeiko Schocher 27d0b37230SHeiko Schocher #define CONFIG_SYS_GENERIC_BOARD 28d0b37230SHeiko Schocher 29389aee89SHeiko Schocher #if defined(CONFIG_SPL_BUILD) 30389aee89SHeiko Schocher #define CONFIG_SYS_THUMB_BUILD 31389aee89SHeiko Schocher #define CONFIG_SYS_ICACHE_OFF 32389aee89SHeiko Schocher #define CONFIG_SYS_DCACHE_OFF 33389aee89SHeiko Schocher #endif 340f8bc283SHeiko Schocher /* 350f8bc283SHeiko Schocher * Warning: changing CONFIG_SYS_TEXT_BASE requires 360f8bc283SHeiko Schocher * adapting the initial boot program. 370f8bc283SHeiko Schocher * Since the linker has to swallow that define, we must use a pure 380f8bc283SHeiko Schocher * hex number here! 390f8bc283SHeiko Schocher */ 400f8bc283SHeiko Schocher 410f8bc283SHeiko Schocher 42237e3793SHeiko Schocher #define CONFIG_SYS_TEXT_BASE 0x21000000 430f8bc283SHeiko Schocher 440f8bc283SHeiko Schocher /* ARM asynchronous clock */ 450f8bc283SHeiko Schocher #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 460f8bc283SHeiko Schocher #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ 470f8bc283SHeiko Schocher 480f8bc283SHeiko Schocher /* Misc CPU related */ 490f8bc283SHeiko Schocher #define CONFIG_ARCH_CPU_INIT 500f8bc283SHeiko Schocher #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 510f8bc283SHeiko Schocher #define CONFIG_SETUP_MEMORY_TAGS 520f8bc283SHeiko Schocher #define CONFIG_INITRD_TAG 530f8bc283SHeiko Schocher #define CONFIG_SKIP_LOWLEVEL_INIT 540f8bc283SHeiko Schocher #define CONFIG_BOARD_EARLY_INIT_F 550f8bc283SHeiko Schocher #define CONFIG_DISPLAY_CPUINFO 560f8bc283SHeiko Schocher 570f8bc283SHeiko Schocher #define CONFIG_CMD_BOOTZ 580f8bc283SHeiko Schocher #define CONFIG_OF_LIBFDT 590f8bc283SHeiko Schocher 600f8bc283SHeiko Schocher /* general purpose I/O */ 610f8bc283SHeiko Schocher #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 620f8bc283SHeiko Schocher #define CONFIG_AT91_GPIO 630f8bc283SHeiko Schocher #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 640f8bc283SHeiko Schocher 650f8bc283SHeiko Schocher /* serial console */ 660f8bc283SHeiko Schocher #define CONFIG_ATMEL_USART 670f8bc283SHeiko Schocher #define CONFIG_USART_BASE ATMEL_BASE_DBGU 680f8bc283SHeiko Schocher #define CONFIG_USART_ID ATMEL_ID_SYS 690f8bc283SHeiko Schocher #define CONFIG_BAUDRATE 115200 700f8bc283SHeiko Schocher 710f8bc283SHeiko Schocher #define CONFIG_BOOTDELAY 3 720f8bc283SHeiko Schocher 730f8bc283SHeiko Schocher /* 740f8bc283SHeiko Schocher * Command line configuration. 750f8bc283SHeiko Schocher */ 760f8bc283SHeiko Schocher #include <config_cmd_default.h> 770f8bc283SHeiko Schocher #undef CONFIG_CMD_BDI 780f8bc283SHeiko Schocher #undef CONFIG_CMD_FPGA 790f8bc283SHeiko Schocher #undef CONFIG_CMD_IMI 800f8bc283SHeiko Schocher #undef CONFIG_CMD_IMLS 810f8bc283SHeiko Schocher #undef CONFIG_CMD_LOADS 820f8bc283SHeiko Schocher #undef CONFIG_CMD_SOURCE 830f8bc283SHeiko Schocher 840f8bc283SHeiko Schocher #define CONFIG_CMD_PING 850f8bc283SHeiko Schocher #define CONFIG_CMD_DHCP 860f8bc283SHeiko Schocher #define CONFIG_CMD_NAND 870f8bc283SHeiko Schocher 880f8bc283SHeiko Schocher /* 890f8bc283SHeiko Schocher * SDRAM: 1 bank, min 32, max 128 MB 900f8bc283SHeiko Schocher * Initialized before u-boot gets started. 910f8bc283SHeiko Schocher */ 920f8bc283SHeiko Schocher #define CONFIG_NR_DRAM_BANKS 1 930f8bc283SHeiko Schocher #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 940f8bc283SHeiko Schocher #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 950f8bc283SHeiko Schocher 960f8bc283SHeiko Schocher /* 970f8bc283SHeiko Schocher * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 980f8bc283SHeiko Schocher * leaving the correct space for initial global data structure above 990f8bc283SHeiko Schocher * that address while providing maximum stack area below. 1000f8bc283SHeiko Schocher */ 1010f8bc283SHeiko Schocher # define CONFIG_SYS_INIT_SP_ADDR \ 1020f8bc283SHeiko Schocher (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 1030f8bc283SHeiko Schocher 1040f8bc283SHeiko Schocher /* NAND flash */ 1050f8bc283SHeiko Schocher #ifdef CONFIG_CMD_NAND 1060f8bc283SHeiko Schocher #define CONFIG_NAND_ATMEL 1070f8bc283SHeiko Schocher #define CONFIG_SYS_MAX_NAND_DEVICE 1 1080f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 1090f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_DBW_8 1100f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 1110f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 1120f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 1130f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 1140f8bc283SHeiko Schocher #endif 1150f8bc283SHeiko Schocher 1160f8bc283SHeiko Schocher /* NOR flash - no real flash on this board */ 1170f8bc283SHeiko Schocher #define CONFIG_SYS_NO_FLASH 1 1180f8bc283SHeiko Schocher 1190f8bc283SHeiko Schocher /* Ethernet */ 1200f8bc283SHeiko Schocher #define CONFIG_MACB 1210f8bc283SHeiko Schocher #define CONFIG_RMII 1220f8bc283SHeiko Schocher #define CONFIG_AT91_WANTS_COMMON_PHY 1230f8bc283SHeiko Schocher 124*f624162fSHeiko Schocher #define CONFIG_AT91SAM9_WATCHDOG 125*f624162fSHeiko Schocher #if !defined(CONFIG_SPL_BUILD) 126*f624162fSHeiko Schocher /* Enable the watchdog */ 127*f624162fSHeiko Schocher #define CONFIG_HW_WATCHDOG 128*f624162fSHeiko Schocher #endif 129*f624162fSHeiko Schocher 1300f8bc283SHeiko Schocher /* USB */ 1310f8bc283SHeiko Schocher #if defined(CONFIG_BOARD_TAURUS) 1320f8bc283SHeiko Schocher #define CONFIG_USB_ATMEL 1330f8bc283SHeiko Schocher #define CONFIG_USB_OHCI_NEW 1340f8bc283SHeiko Schocher #define CONFIG_SYS_USB_OHCI_CPU_INIT 1350f8bc283SHeiko Schocher #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 1360f8bc283SHeiko Schocher #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 1370f8bc283SHeiko Schocher #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 1380f8bc283SHeiko Schocher #define CONFIG_USB_STORAGE 1390f8bc283SHeiko Schocher #endif 1400f8bc283SHeiko Schocher 14150921cdcSHeiko Schocher /* SPI EEPROM */ 14250921cdcSHeiko Schocher #define CONFIG_SPI 14350921cdcSHeiko Schocher #define CONFIG_CMD_SPI 14450921cdcSHeiko Schocher #define CONFIG_CMD_SF 14550921cdcSHeiko Schocher #define CONFIG_SPI_FLASH 14650921cdcSHeiko Schocher #define CONFIG_ATMEL_SPI 14750921cdcSHeiko Schocher #define CONFIG_SPI_FLASH_STMICRO 14850921cdcSHeiko Schocher #define TAURUS_SPI_MASK (1 << 4) 14950921cdcSHeiko Schocher #define TAURUS_SPI_CS_PIN AT91_PIN_PA3 15050921cdcSHeiko Schocher 151a1655bb2SHeiko Schocher #if defined(CONFIG_SPL_BUILD) 152a1655bb2SHeiko Schocher /* SPL related */ 153a1655bb2SHeiko Schocher #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ 154a1655bb2SHeiko Schocher #define CONFIG_SPL_SPI_SUPPORT 155a1655bb2SHeiko Schocher #define CONFIG_SPL_SPI_FLASH_SUPPORT 156a1655bb2SHeiko Schocher #define CONFIG_SPL_SPI_LOAD 157a1655bb2SHeiko Schocher #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 158a1655bb2SHeiko Schocher 159a1655bb2SHeiko Schocher #define CONFIG_SF_DEFAULT_BUS 0 160a1655bb2SHeiko Schocher #define CONFIG_SF_DEFAULT_SPEED 10000000 161a1655bb2SHeiko Schocher #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 162a1655bb2SHeiko Schocher #endif 163a1655bb2SHeiko Schocher 1640f8bc283SHeiko Schocher /* load address */ 1650f8bc283SHeiko Schocher #define CONFIG_SYS_LOAD_ADDR 0x22000000 1660f8bc283SHeiko Schocher 1670f8bc283SHeiko Schocher /* bootstrap in spi flash , u-boot + env + linux in nandflash */ 1680f8bc283SHeiko Schocher #define CONFIG_ENV_IS_IN_NAND 1690f8bc283SHeiko Schocher #define CONFIG_ENV_OFFSET 0x100000 1700f8bc283SHeiko Schocher #define CONFIG_ENV_OFFSET_REDUND 0x180000 1710f8bc283SHeiko Schocher #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 1720f8bc283SHeiko Schocher #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" 1730f8bc283SHeiko Schocher #define CONFIG_BOOTARGS \ 1740f8bc283SHeiko Schocher "console=ttyS0,115200 earlyprintk " \ 1750f8bc283SHeiko Schocher "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 1760f8bc283SHeiko Schocher "256k(env),256k(env_redundant),256k(spare)," \ 1770f8bc283SHeiko Schocher "512k(dtb),6M(kernel)ro,-(rootfs) " \ 1780f8bc283SHeiko Schocher "root=/dev/mtdblock7 rw rootfstype=jffs2" 1790f8bc283SHeiko Schocher 1800f8bc283SHeiko Schocher #define CONFIG_SYS_PROMPT "U-Boot> " 1810f8bc283SHeiko Schocher #define CONFIG_SYS_CBSIZE 256 1820f8bc283SHeiko Schocher #define CONFIG_SYS_MAXARGS 16 1830f8bc283SHeiko Schocher #define CONFIG_SYS_PBSIZE \ 1840f8bc283SHeiko Schocher (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 1850f8bc283SHeiko Schocher #define CONFIG_SYS_LONGHELP 1860f8bc283SHeiko Schocher #define CONFIG_CMDLINE_EDITING 1870f8bc283SHeiko Schocher #define CONFIG_AUTO_COMPLETE 1880f8bc283SHeiko Schocher 1890f8bc283SHeiko Schocher /* 1900f8bc283SHeiko Schocher * Size of malloc() pool 1910f8bc283SHeiko Schocher */ 1920f8bc283SHeiko Schocher #define CONFIG_SYS_MALLOC_LEN \ 1930f8bc283SHeiko Schocher ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 1940f8bc283SHeiko Schocher 195237e3793SHeiko Schocher /* Defines for SPL */ 196237e3793SHeiko Schocher #define CONFIG_SPL_FRAMEWORK 197237e3793SHeiko Schocher #define CONFIG_SPL_TEXT_BASE 0x0 198a1655bb2SHeiko Schocher #define CONFIG_SPL_MAX_SIZE (14 * 1024) 199237e3793SHeiko Schocher #define CONFIG_SPL_STACK (16 * 1024) 200a1655bb2SHeiko Schocher #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ 201a1655bb2SHeiko Schocher CONFIG_SYS_MALLOC_LEN) 202a1655bb2SHeiko Schocher #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN 203237e3793SHeiko Schocher 204237e3793SHeiko Schocher #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE 205237e3793SHeiko Schocher #define CONFIG_SPL_BSS_MAX_SIZE (3 * 1024) 206237e3793SHeiko Schocher 207237e3793SHeiko Schocher #define CONFIG_SPL_LIBCOMMON_SUPPORT 208237e3793SHeiko Schocher #define CONFIG_SPL_LIBGENERIC_SUPPORT 209237e3793SHeiko Schocher #define CONFIG_SPL_SERIAL_SUPPORT 210237e3793SHeiko Schocher 211237e3793SHeiko Schocher #define CONFIG_SPL_BOARD_INIT 212237e3793SHeiko Schocher #define CONFIG_SPL_GPIO_SUPPORT 213237e3793SHeiko Schocher #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) 214237e3793SHeiko Schocher #define CONFIG_SPL_NAND_SUPPORT 215237e3793SHeiko Schocher #define CONFIG_SYS_USE_NANDFLASH 1 216237e3793SHeiko Schocher #define CONFIG_SPL_NAND_DRIVERS 217237e3793SHeiko Schocher #define CONFIG_SPL_NAND_BASE 218237e3793SHeiko Schocher #define CONFIG_SPL_NAND_ECC 219237e3793SHeiko Schocher #define CONFIG_SPL_NAND_RAW_ONLY 220237e3793SHeiko Schocher #define CONFIG_SPL_NAND_SOFTECC 221237e3793SHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 222237e3793SHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 223237e3793SHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 224237e3793SHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 225237e3793SHeiko Schocher #define CONFIG_SYS_NAND_5_ADDR_CYCLE 226237e3793SHeiko Schocher 227237e3793SHeiko Schocher #define CONFIG_SYS_NAND_SIZE (256*1024*1024) 228237e3793SHeiko Schocher #define CONFIG_SYS_NAND_PAGE_SIZE 2048 229237e3793SHeiko Schocher #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 230237e3793SHeiko Schocher #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 231237e3793SHeiko Schocher CONFIG_SYS_NAND_PAGE_SIZE) 232237e3793SHeiko Schocher #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 233237e3793SHeiko Schocher #define CONFIG_SYS_NAND_ECCSIZE 256 234237e3793SHeiko Schocher #define CONFIG_SYS_NAND_ECCBYTES 3 235237e3793SHeiko Schocher #define CONFIG_SYS_NAND_OOBSIZE 64 236237e3793SHeiko Schocher #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 237237e3793SHeiko Schocher 48, 49, 50, 51, 52, 53, 54, 55, \ 238237e3793SHeiko Schocher 56, 57, 58, 59, 60, 61, 62, 63, } 239237e3793SHeiko Schocher 240237e3793SHeiko Schocher 241237e3793SHeiko Schocher #define CONFIG_SPL_ATMEL_SIZE 242237e3793SHeiko Schocher #define CONFIG_SYS_MASTER_CLOCK 132096000 243237e3793SHeiko Schocher #define AT91_PLL_LOCK_TIMEOUT 1000000 244237e3793SHeiko Schocher #define CONFIG_SYS_AT91_PLLA 0x202A3F01 245237e3793SHeiko Schocher #define CONFIG_SYS_MCKR 0x1300 246237e3793SHeiko Schocher #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) 247237e3793SHeiko Schocher #define CONFIG_SYS_AT91_PLLB 0x10193F05 2480f8bc283SHeiko Schocher #endif 249