10f8bc283SHeiko Schocher /* 20f8bc283SHeiko Schocher * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards 30f8bc283SHeiko Schocher * (C) Copyright 2013 Siemens AG 40f8bc283SHeiko Schocher * 50f8bc283SHeiko Schocher * Based on: 60f8bc283SHeiko Schocher * U-Boot file: include/configs/at91sam9260ek.h 70f8bc283SHeiko Schocher * 80f8bc283SHeiko Schocher * (C) Copyright 2007-2008 90f8bc283SHeiko Schocher * Stelian Pop <stelian@popies.net> 100f8bc283SHeiko Schocher * Lead Tech Design <www.leadtechdesign.com> 110f8bc283SHeiko Schocher * 120f8bc283SHeiko Schocher * SPDX-License-Identifier: GPL-2.0+ 130f8bc283SHeiko Schocher */ 140f8bc283SHeiko Schocher 150f8bc283SHeiko Schocher #ifndef __CONFIG_H 160f8bc283SHeiko Schocher #define __CONFIG_H 170f8bc283SHeiko Schocher 180f8bc283SHeiko Schocher /* 190f8bc283SHeiko Schocher * SoC must be defined first, before hardware.h is included. 200f8bc283SHeiko Schocher * In this case SoC is defined in boards.cfg. 210f8bc283SHeiko Schocher */ 220f8bc283SHeiko Schocher #include <asm/hardware.h> 230f8bc283SHeiko Schocher 240f8bc283SHeiko Schocher #define MACH_TYPE_TAURUS 2067 250f8bc283SHeiko Schocher #define MACH_TYPE_AXM 2068 260f8bc283SHeiko Schocher 27d0b37230SHeiko Schocher #define CONFIG_SYS_GENERIC_BOARD 28d0b37230SHeiko Schocher 290f8bc283SHeiko Schocher /* 300f8bc283SHeiko Schocher * Warning: changing CONFIG_SYS_TEXT_BASE requires 310f8bc283SHeiko Schocher * adapting the initial boot program. 320f8bc283SHeiko Schocher * Since the linker has to swallow that define, we must use a pure 330f8bc283SHeiko Schocher * hex number here! 340f8bc283SHeiko Schocher */ 350f8bc283SHeiko Schocher 360f8bc283SHeiko Schocher 37*237e3793SHeiko Schocher #define CONFIG_SYS_TEXT_BASE 0x21000000 380f8bc283SHeiko Schocher 390f8bc283SHeiko Schocher /* ARM asynchronous clock */ 400f8bc283SHeiko Schocher #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 410f8bc283SHeiko Schocher #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ 420f8bc283SHeiko Schocher 430f8bc283SHeiko Schocher /* Misc CPU related */ 440f8bc283SHeiko Schocher #define CONFIG_ARCH_CPU_INIT 450f8bc283SHeiko Schocher #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 460f8bc283SHeiko Schocher #define CONFIG_SETUP_MEMORY_TAGS 470f8bc283SHeiko Schocher #define CONFIG_INITRD_TAG 480f8bc283SHeiko Schocher #define CONFIG_SKIP_LOWLEVEL_INIT 490f8bc283SHeiko Schocher #define CONFIG_BOARD_EARLY_INIT_F 500f8bc283SHeiko Schocher #define CONFIG_DISPLAY_CPUINFO 510f8bc283SHeiko Schocher 520f8bc283SHeiko Schocher #define CONFIG_CMD_BOOTZ 530f8bc283SHeiko Schocher #define CONFIG_OF_LIBFDT 540f8bc283SHeiko Schocher 550f8bc283SHeiko Schocher /* general purpose I/O */ 560f8bc283SHeiko Schocher #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 570f8bc283SHeiko Schocher #define CONFIG_AT91_GPIO 580f8bc283SHeiko Schocher #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 590f8bc283SHeiko Schocher 600f8bc283SHeiko Schocher /* serial console */ 610f8bc283SHeiko Schocher #define CONFIG_ATMEL_USART 620f8bc283SHeiko Schocher #define CONFIG_USART_BASE ATMEL_BASE_DBGU 630f8bc283SHeiko Schocher #define CONFIG_USART_ID ATMEL_ID_SYS 640f8bc283SHeiko Schocher #define CONFIG_BAUDRATE 115200 650f8bc283SHeiko Schocher 660f8bc283SHeiko Schocher #define CONFIG_BOOTDELAY 3 670f8bc283SHeiko Schocher 680f8bc283SHeiko Schocher /* 690f8bc283SHeiko Schocher * Command line configuration. 700f8bc283SHeiko Schocher */ 710f8bc283SHeiko Schocher #include <config_cmd_default.h> 720f8bc283SHeiko Schocher #undef CONFIG_CMD_BDI 730f8bc283SHeiko Schocher #undef CONFIG_CMD_FPGA 740f8bc283SHeiko Schocher #undef CONFIG_CMD_IMI 750f8bc283SHeiko Schocher #undef CONFIG_CMD_IMLS 760f8bc283SHeiko Schocher #undef CONFIG_CMD_LOADS 770f8bc283SHeiko Schocher #undef CONFIG_CMD_SOURCE 780f8bc283SHeiko Schocher 790f8bc283SHeiko Schocher #define CONFIG_CMD_PING 800f8bc283SHeiko Schocher #define CONFIG_CMD_DHCP 810f8bc283SHeiko Schocher #define CONFIG_CMD_NAND 820f8bc283SHeiko Schocher 830f8bc283SHeiko Schocher /* 840f8bc283SHeiko Schocher * SDRAM: 1 bank, min 32, max 128 MB 850f8bc283SHeiko Schocher * Initialized before u-boot gets started. 860f8bc283SHeiko Schocher */ 870f8bc283SHeiko Schocher #define CONFIG_NR_DRAM_BANKS 1 880f8bc283SHeiko Schocher #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 890f8bc283SHeiko Schocher #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 900f8bc283SHeiko Schocher 910f8bc283SHeiko Schocher /* 920f8bc283SHeiko Schocher * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 930f8bc283SHeiko Schocher * leaving the correct space for initial global data structure above 940f8bc283SHeiko Schocher * that address while providing maximum stack area below. 950f8bc283SHeiko Schocher */ 960f8bc283SHeiko Schocher # define CONFIG_SYS_INIT_SP_ADDR \ 970f8bc283SHeiko Schocher (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 980f8bc283SHeiko Schocher 990f8bc283SHeiko Schocher /* NAND flash */ 1000f8bc283SHeiko Schocher #ifdef CONFIG_CMD_NAND 1010f8bc283SHeiko Schocher #define CONFIG_NAND_ATMEL 1020f8bc283SHeiko Schocher #define CONFIG_SYS_MAX_NAND_DEVICE 1 1030f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 1040f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_DBW_8 1050f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 1060f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 1070f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 1080f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 1090f8bc283SHeiko Schocher #endif 1100f8bc283SHeiko Schocher 1110f8bc283SHeiko Schocher /* NOR flash - no real flash on this board */ 1120f8bc283SHeiko Schocher #define CONFIG_SYS_NO_FLASH 1 1130f8bc283SHeiko Schocher 1140f8bc283SHeiko Schocher /* Ethernet */ 1150f8bc283SHeiko Schocher #define CONFIG_MACB 1160f8bc283SHeiko Schocher #define CONFIG_RMII 1170f8bc283SHeiko Schocher #define CONFIG_AT91_WANTS_COMMON_PHY 1180f8bc283SHeiko Schocher 1190f8bc283SHeiko Schocher /* USB */ 1200f8bc283SHeiko Schocher #if defined(CONFIG_BOARD_TAURUS) 1210f8bc283SHeiko Schocher #define CONFIG_USB_ATMEL 1220f8bc283SHeiko Schocher #define CONFIG_USB_OHCI_NEW 1230f8bc283SHeiko Schocher #define CONFIG_SYS_USB_OHCI_CPU_INIT 1240f8bc283SHeiko Schocher #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 1250f8bc283SHeiko Schocher #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 1260f8bc283SHeiko Schocher #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 1270f8bc283SHeiko Schocher #define CONFIG_USB_STORAGE 1280f8bc283SHeiko Schocher #endif 1290f8bc283SHeiko Schocher 13050921cdcSHeiko Schocher /* SPI EEPROM */ 13150921cdcSHeiko Schocher #define CONFIG_SPI 13250921cdcSHeiko Schocher #define CONFIG_CMD_SPI 13350921cdcSHeiko Schocher #define CONFIG_CMD_SF 13450921cdcSHeiko Schocher #define CONFIG_SPI_FLASH 13550921cdcSHeiko Schocher #define CONFIG_ATMEL_SPI 13650921cdcSHeiko Schocher #define CONFIG_SPI_FLASH_STMICRO 13750921cdcSHeiko Schocher #define TAURUS_SPI_MASK (1 << 4) 13850921cdcSHeiko Schocher #define TAURUS_SPI_CS_PIN AT91_PIN_PA3 13950921cdcSHeiko Schocher 1400f8bc283SHeiko Schocher /* load address */ 1410f8bc283SHeiko Schocher #define CONFIG_SYS_LOAD_ADDR 0x22000000 1420f8bc283SHeiko Schocher 1430f8bc283SHeiko Schocher /* bootstrap in spi flash , u-boot + env + linux in nandflash */ 1440f8bc283SHeiko Schocher #define CONFIG_ENV_IS_IN_NAND 1450f8bc283SHeiko Schocher #define CONFIG_ENV_OFFSET 0x100000 1460f8bc283SHeiko Schocher #define CONFIG_ENV_OFFSET_REDUND 0x180000 1470f8bc283SHeiko Schocher #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 1480f8bc283SHeiko Schocher #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" 1490f8bc283SHeiko Schocher #define CONFIG_BOOTARGS \ 1500f8bc283SHeiko Schocher "console=ttyS0,115200 earlyprintk " \ 1510f8bc283SHeiko Schocher "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 1520f8bc283SHeiko Schocher "256k(env),256k(env_redundant),256k(spare)," \ 1530f8bc283SHeiko Schocher "512k(dtb),6M(kernel)ro,-(rootfs) " \ 1540f8bc283SHeiko Schocher "root=/dev/mtdblock7 rw rootfstype=jffs2" 1550f8bc283SHeiko Schocher 1560f8bc283SHeiko Schocher #define CONFIG_SYS_PROMPT "U-Boot> " 1570f8bc283SHeiko Schocher #define CONFIG_SYS_CBSIZE 256 1580f8bc283SHeiko Schocher #define CONFIG_SYS_MAXARGS 16 1590f8bc283SHeiko Schocher #define CONFIG_SYS_PBSIZE \ 1600f8bc283SHeiko Schocher (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 1610f8bc283SHeiko Schocher #define CONFIG_SYS_LONGHELP 1620f8bc283SHeiko Schocher #define CONFIG_CMDLINE_EDITING 1630f8bc283SHeiko Schocher #define CONFIG_AUTO_COMPLETE 1640f8bc283SHeiko Schocher 1650f8bc283SHeiko Schocher /* 1660f8bc283SHeiko Schocher * Size of malloc() pool 1670f8bc283SHeiko Schocher */ 1680f8bc283SHeiko Schocher #define CONFIG_SYS_MALLOC_LEN \ 1690f8bc283SHeiko Schocher ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 1700f8bc283SHeiko Schocher 171*237e3793SHeiko Schocher /* Defines for SPL */ 172*237e3793SHeiko Schocher #define CONFIG_SPL_FRAMEWORK 173*237e3793SHeiko Schocher #define CONFIG_SPL_TEXT_BASE 0x0 174*237e3793SHeiko Schocher #define CONFIG_SPL_MAX_SIZE (11 * 1024) 175*237e3793SHeiko Schocher #define CONFIG_SPL_STACK (16 * 1024) 176*237e3793SHeiko Schocher 177*237e3793SHeiko Schocher #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE 178*237e3793SHeiko Schocher #define CONFIG_SPL_BSS_MAX_SIZE (3 * 1024) 179*237e3793SHeiko Schocher 180*237e3793SHeiko Schocher #define CONFIG_SPL_LIBCOMMON_SUPPORT 181*237e3793SHeiko Schocher #define CONFIG_SPL_LIBGENERIC_SUPPORT 182*237e3793SHeiko Schocher #define CONFIG_SPL_SERIAL_SUPPORT 183*237e3793SHeiko Schocher 184*237e3793SHeiko Schocher #define CONFIG_SPL_BOARD_INIT 185*237e3793SHeiko Schocher #define CONFIG_SPL_GPIO_SUPPORT 186*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) 187*237e3793SHeiko Schocher #define CONFIG_SPL_NAND_SUPPORT 188*237e3793SHeiko Schocher #define CONFIG_SYS_USE_NANDFLASH 1 189*237e3793SHeiko Schocher #define CONFIG_SPL_NAND_DRIVERS 190*237e3793SHeiko Schocher #define CONFIG_SPL_NAND_BASE 191*237e3793SHeiko Schocher #define CONFIG_SPL_NAND_ECC 192*237e3793SHeiko Schocher #define CONFIG_SPL_NAND_RAW_ONLY 193*237e3793SHeiko Schocher #define CONFIG_SPL_NAND_SOFTECC 194*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 195*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 196*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 197*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 198*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_5_ADDR_CYCLE 199*237e3793SHeiko Schocher 200*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_SIZE (256*1024*1024) 201*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_PAGE_SIZE 2048 202*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 203*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 204*237e3793SHeiko Schocher CONFIG_SYS_NAND_PAGE_SIZE) 205*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 206*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_ECCSIZE 256 207*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_ECCBYTES 3 208*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_OOBSIZE 64 209*237e3793SHeiko Schocher #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 210*237e3793SHeiko Schocher 48, 49, 50, 51, 52, 53, 54, 55, \ 211*237e3793SHeiko Schocher 56, 57, 58, 59, 60, 61, 62, 63, } 212*237e3793SHeiko Schocher 213*237e3793SHeiko Schocher 214*237e3793SHeiko Schocher #define CONFIG_SPL_ATMEL_SIZE 215*237e3793SHeiko Schocher #define CONFIG_SYS_MASTER_CLOCK 132096000 216*237e3793SHeiko Schocher #define AT91_PLL_LOCK_TIMEOUT 1000000 217*237e3793SHeiko Schocher #define CONFIG_SYS_AT91_PLLA 0x202A3F01 218*237e3793SHeiko Schocher #define CONFIG_SYS_MCKR 0x1300 219*237e3793SHeiko Schocher #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) 220*237e3793SHeiko Schocher #define CONFIG_SYS_AT91_PLLB 0x10193F05 2210f8bc283SHeiko Schocher #endif 222