1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2011 4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 5 * 6 * Copyright (C) 2009 TechNexion Ltd. 7 */ 8 9 #ifndef __TAM3517_H 10 #define __TAM3517_H 11 12 /* 13 * High Level Configuration Options 14 */ 15 16 #include <asm/arch/cpu.h> /* get chip and board defs */ 17 #include <asm/arch/omap.h> 18 19 /* Clock Defines */ 20 #define V_OSCK 26000000 /* Clock output from T2 */ 21 #define V_SCLK (V_OSCK >> 1) 22 23 #define CONFIG_MISC_INIT_R 24 25 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 26 #define CONFIG_SETUP_MEMORY_TAGS 27 #define CONFIG_INITRD_TAG 28 #define CONFIG_REVISION_TAG 29 30 /* 31 * Size of malloc() pool 32 */ 33 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 34 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ 35 2 * 1024 * 1024) 36 /* 37 * DDR related 38 */ 39 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 40 41 /* 42 * Hardware drivers 43 */ 44 45 /* 46 * NS16550 Configuration 47 */ 48 #define CONFIG_SYS_NS16550_SERIAL 49 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 50 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 51 52 /* 53 * select serial console configuration 54 */ 55 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 56 #define CONFIG_SERIAL1 /* UART1 */ 57 58 /* allow to overwrite serial and ethaddr */ 59 #define CONFIG_ENV_OVERWRITE 60 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 61 115200} 62 /* EHCI */ 63 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 64 65 #define CONFIG_SYS_I2C 66 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ 67 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 68 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 69 70 /* 71 * Board NAND Info. 72 */ 73 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 74 /* to access */ 75 /* nand at CS0 */ 76 77 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 78 /* NAND devices */ 79 80 /* 81 * Miscellaneous configurable options 82 */ 83 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 84 85 #define CONFIG_SYS_MAXARGS 32 /* max number of command */ 86 /* args */ 87 /* memtest works on */ 88 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 89 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 90 0x01F00000) /* 31MB */ 91 92 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 93 /* address */ 94 95 /* 96 * AM3517 has 12 GP timers, they can be driven by the system clock 97 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 98 * This rate is divided by a local divisor. 99 */ 100 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 101 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 102 103 /* 104 * Physical Memory Map 105 */ 106 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 107 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 108 109 /* 110 * FLASH and environment organization 111 */ 112 113 /* **** PISMO SUPPORT *** */ 114 115 /* Redundant Environment */ 116 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 117 #define CONFIG_ENV_OFFSET 0x180000 118 #define CONFIG_ENV_ADDR 0x180000 119 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 120 2 * CONFIG_SYS_ENV_SECT_SIZE) 121 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 122 123 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 124 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 125 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 126 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 127 CONFIG_SYS_INIT_RAM_SIZE - \ 128 GENERATED_GBL_DATA_SIZE) 129 130 /* 131 * ethernet support, EMAC 132 * 133 */ 134 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 135 #define CONFIG_BOOTP_DNS2 136 #define CONFIG_BOOTP_SEND_HOSTNAME 137 #define CONFIG_NET_RETRY_COUNT 10 138 139 /* Defines for SPL */ 140 #define CONFIG_SPL_CONSOLE 141 #define CONFIG_SPL_NAND_SOFTECC 142 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ 143 144 #define CONFIG_SPL_NAND_BASE 145 #define CONFIG_SPL_NAND_DRIVERS 146 #define CONFIG_SPL_NAND_ECC 147 148 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 149 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 150 CONFIG_SPL_TEXT_BASE) 151 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 152 153 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 154 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 155 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ 156 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 157 158 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 159 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 160 161 /* FAT */ 162 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 163 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 164 165 /* RAW SD card / eMMC */ 166 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ 167 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ 168 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ 169 170 /* NAND boot config */ 171 #define CONFIG_SYS_NAND_PAGE_COUNT 64 172 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 173 #define CONFIG_SYS_NAND_OOBSIZE 64 174 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 175 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 176 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 177 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 178 48, 49, 50, 51, 52, 53, 54, 55,\ 179 56, 57, 58, 59, 60, 61, 62, 63} 180 #define CONFIG_SYS_NAND_ECCSIZE 256 181 #define CONFIG_SYS_NAND_ECCBYTES 3 182 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 183 184 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 185 186 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 187 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 188 189 /* Setup MTD for NAND on the SOM */ 190 191 #define CONFIG_TAM3517_SETTINGS \ 192 "netdev=eth0\0" \ 193 "nandargs=setenv bootargs root=${nandroot} " \ 194 "rootfstype=${nandrootfstype}\0" \ 195 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 196 "nfsroot=${serverip}:${rootpath}\0" \ 197 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 198 "addip_sta=setenv bootargs ${bootargs} " \ 199 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 200 ":${hostname}:${netdev}:off panic=1\0" \ 201 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 202 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 203 "else run addip_sta;fi\0" \ 204 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 205 "addtty=setenv bootargs ${bootargs}" \ 206 " console=ttyO0,${baudrate}\0" \ 207 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 208 "loadaddr=82000000\0" \ 209 "kernel_addr_r=82000000\0" \ 210 "hostname=" CONFIG_HOSTNAME "\0" \ 211 "bootfile=" CONFIG_HOSTNAME "/uImage\0" \ 212 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 213 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 214 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 215 "bootm ${kernel_addr}\0" \ 216 "nandboot=run nandargs addip addtty addmtd addmisc;" \ 217 "nand read ${kernel_addr_r} kernel\0" \ 218 "bootm ${kernel_addr_r}\0" \ 219 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 220 "run nfsargs addip addtty addmtd addmisc;" \ 221 "bootm ${kernel_addr_r}\0" \ 222 "net_self=if run net_self_load;then " \ 223 "run ramargs addip addtty addmtd addmisc;" \ 224 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 225 "else echo Images not loades;fi\0" \ 226 "u-boot=" CONFIG_HOSTNAME "/u-boot.img\0" \ 227 "load=tftp ${loadaddr} ${u-boot}\0" \ 228 "loadmlo=tftp ${loadaddr} ${mlo}\0" \ 229 "mlo=" CONFIG_HOSTNAME "/MLO\0" \ 230 "uboot_addr=0x80000\0" \ 231 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ 232 "nand write ${loadaddr} ${uboot_addr} 80000\0" \ 233 "updatemlo=nandecc hw;nand erase 0 20000;" \ 234 "nand write ${loadaddr} 0 20000\0" \ 235 "upd=if run load;then echo Updating u-boot;if run update;" \ 236 "then echo U-Boot updated;" \ 237 "else echo Error updating u-boot !;" \ 238 "echo Board without bootloader !!;" \ 239 "fi;" \ 240 "else echo U-Boot not downloaded..exiting;fi\0" \ 241 242 /* 243 * this is common code for all TAM3517 boards. 244 * MAC address is stored from manufacturer in 245 * I2C EEPROM 246 */ 247 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) 248 /* 249 * The I2C EEPROM on the TAM3517 contains 250 * mac address and production data 251 */ 252 struct tam3517_module_info { 253 char customer[48]; 254 char product[48]; 255 256 /* 257 * bit 0~47 : sequence number 258 * bit 48~55 : week of year, from 0. 259 * bit 56~63 : year 260 */ 261 unsigned long long sequence_number; 262 263 /* 264 * bit 0~7 : revision fixed 265 * bit 8~15 : revision major 266 * bit 16~31 : TNxxx 267 */ 268 unsigned int revision; 269 unsigned char eth_addr[4][8]; 270 unsigned char _rev[100]; 271 }; 272 273 #define TAM3517_READ_EEPROM(info, ret) \ 274 do { \ 275 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \ 276 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \ 277 (void *)info, sizeof(*info))) \ 278 ret = 1; \ 279 else \ 280 ret = 0; \ 281 } while (0) 282 283 #define TAM3517_READ_MAC_FROM_EEPROM(info) \ 284 do { \ 285 char buf[80], ethname[20]; \ 286 int i; \ 287 memset(buf, 0, sizeof(buf)); \ 288 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \ 289 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \ 290 (info)->eth_addr[i][5], \ 291 (info)->eth_addr[i][4], \ 292 (info)->eth_addr[i][3], \ 293 (info)->eth_addr[i][2], \ 294 (info)->eth_addr[i][1], \ 295 (info)->eth_addr[i][0]); \ 296 \ 297 if (i) \ 298 sprintf(ethname, "eth%daddr", i); \ 299 else \ 300 strcpy(ethname, "ethaddr"); \ 301 printf("Setting %s from EEPROM with %s\n", ethname, buf);\ 302 env_set(ethname, buf); \ 303 } \ 304 } while (0) 305 306 /* The following macros are taken from Technexion's documentation */ 307 #define TAM3517_sequence_number(info) \ 308 ((info)->sequence_number % 0x1000000000000LL) 309 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100) 310 #define TAM3517_year(info) ((info)->sequence_number >> 56) 311 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100) 312 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100) 313 #define TAM3517_revision_tn(info) ((info)->revision >> 16) 314 315 #define TAM3517_PRINT_SOM_INFO(info) \ 316 do { \ 317 printf("Vendor:%s\n", (info)->customer); \ 318 printf("SOM: %s\n", (info)->product); \ 319 printf("SeqNr: %02llu%02llu%012llu\n", \ 320 TAM3517_year(info), \ 321 TAM3517_week_of_year(info), \ 322 TAM3517_sequence_number(info)); \ 323 printf("Rev: TN%u %u.%u\n", \ 324 TAM3517_revision_tn(info), \ 325 TAM3517_revision_major(info), \ 326 TAM3517_revision_fixed(info)); \ 327 } while (0) 328 329 #endif 330 331 #endif /* __TAM3517_H */ 332