1 /* 2 * Copyright (C) 2011 3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 4 * 5 * Copyright (C) 2009 TechNexion Ltd. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __TAM3517_H 11 #define __TAM3517_H 12 13 /* 14 * High Level Configuration Options 15 */ 16 17 #define CONFIG_SYS_TEXT_BASE 0x80008000 18 19 #include <asm/arch/cpu.h> /* get chip and board defs */ 20 #include <asm/arch/omap.h> 21 22 /* Clock Defines */ 23 #define V_OSCK 26000000 /* Clock output from T2 */ 24 #define V_SCLK (V_OSCK >> 1) 25 26 #define CONFIG_MISC_INIT_R 27 28 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 29 #define CONFIG_SETUP_MEMORY_TAGS 30 #define CONFIG_INITRD_TAG 31 #define CONFIG_REVISION_TAG 32 33 /* 34 * Size of malloc() pool 35 */ 36 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 37 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ 38 2 * 1024 * 1024) 39 /* 40 * DDR related 41 */ 42 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 43 44 /* 45 * Hardware drivers 46 */ 47 48 /* 49 * NS16550 Configuration 50 */ 51 #define CONFIG_SYS_NS16550_SERIAL 52 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 53 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 54 55 /* 56 * select serial console configuration 57 */ 58 #define CONFIG_CONS_INDEX 1 59 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 60 #define CONFIG_SERIAL1 /* UART1 */ 61 62 /* allow to overwrite serial and ethaddr */ 63 #define CONFIG_ENV_OVERWRITE 64 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 65 115200} 66 /* EHCI */ 67 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 68 69 #define CONFIG_SYS_I2C 70 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 71 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 72 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ 73 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 74 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 75 76 /* 77 * Board NAND Info. 78 */ 79 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 80 /* to access */ 81 /* nand at CS0 */ 82 83 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 84 /* NAND devices */ 85 86 #define CONFIG_AUTO_COMPLETE 87 88 /* 89 * Miscellaneous configurable options 90 */ 91 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 92 #define CONFIG_CMDLINE_EDITING 93 #define CONFIG_AUTO_COMPLETE 94 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 95 96 #define CONFIG_SYS_MAXARGS 32 /* max number of command */ 97 /* args */ 98 /* memtest works on */ 99 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 100 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 101 0x01F00000) /* 31MB */ 102 103 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 104 /* address */ 105 106 /* 107 * AM3517 has 12 GP timers, they can be driven by the system clock 108 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 109 * This rate is divided by a local divisor. 110 */ 111 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 112 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 113 114 /* 115 * Physical Memory Map 116 */ 117 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 118 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 119 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 120 121 /* 122 * FLASH and environment organization 123 */ 124 125 /* **** PISMO SUPPORT *** */ 126 127 /* Redundant Environment */ 128 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 129 #define CONFIG_ENV_OFFSET 0x180000 130 #define CONFIG_ENV_ADDR 0x180000 131 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 132 2 * CONFIG_SYS_ENV_SECT_SIZE) 133 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 134 135 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 136 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 137 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 138 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 139 CONFIG_SYS_INIT_RAM_SIZE - \ 140 GENERATED_GBL_DATA_SIZE) 141 142 /* 143 * ethernet support, EMAC 144 * 145 */ 146 #define CONFIG_DRIVER_TI_EMAC 147 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 148 #define CONFIG_MII 149 #define CONFIG_BOOTP_DNS 150 #define CONFIG_BOOTP_DNS2 151 #define CONFIG_BOOTP_SEND_HOSTNAME 152 #define CONFIG_NET_RETRY_COUNT 10 153 154 /* Defines for SPL */ 155 #define CONFIG_SPL_FRAMEWORK 156 #define CONFIG_SPL_CONSOLE 157 #define CONFIG_SPL_NAND_SOFTECC 158 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ 159 160 #define CONFIG_SPL_NAND_BASE 161 #define CONFIG_SPL_NAND_DRIVERS 162 #define CONFIG_SPL_NAND_ECC 163 164 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 165 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 166 CONFIG_SPL_TEXT_BASE) 167 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 168 169 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 170 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 171 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ 172 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 173 174 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 175 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 176 177 /* FAT */ 178 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 179 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 180 181 /* RAW SD card / eMMC */ 182 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ 183 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ 184 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ 185 186 /* NAND boot config */ 187 #define CONFIG_SYS_NAND_PAGE_COUNT 64 188 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 189 #define CONFIG_SYS_NAND_OOBSIZE 64 190 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 191 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 192 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 193 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 194 48, 49, 50, 51, 52, 53, 54, 55,\ 195 56, 57, 58, 59, 60, 61, 62, 63} 196 #define CONFIG_SYS_NAND_ECCSIZE 256 197 #define CONFIG_SYS_NAND_ECCBYTES 3 198 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 199 200 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 201 202 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 203 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 204 205 #define CONFIG_MTD_PARTITIONS 206 #define CONFIG_MTD_DEVICE 207 208 /* Setup MTD for NAND on the SOM */ 209 210 #define CONFIG_TAM3517_SETTINGS \ 211 "netdev=eth0\0" \ 212 "nandargs=setenv bootargs root=${nandroot} " \ 213 "rootfstype=${nandrootfstype}\0" \ 214 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 215 "nfsroot=${serverip}:${rootpath}\0" \ 216 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 217 "addip_sta=setenv bootargs ${bootargs} " \ 218 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 219 ":${hostname}:${netdev}:off panic=1\0" \ 220 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 221 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 222 "else run addip_sta;fi\0" \ 223 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 224 "addtty=setenv bootargs ${bootargs}" \ 225 " console=ttyO0,${baudrate}\0" \ 226 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 227 "loadaddr=82000000\0" \ 228 "kernel_addr_r=82000000\0" \ 229 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 230 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 231 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 232 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 233 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 234 "bootm ${kernel_addr}\0" \ 235 "nandboot=run nandargs addip addtty addmtd addmisc;" \ 236 "nand read ${kernel_addr_r} kernel\0" \ 237 "bootm ${kernel_addr_r}\0" \ 238 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 239 "run nfsargs addip addtty addmtd addmisc;" \ 240 "bootm ${kernel_addr_r}\0" \ 241 "net_self=if run net_self_load;then " \ 242 "run ramargs addip addtty addmtd addmisc;" \ 243 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 244 "else echo Images not loades;fi\0" \ 245 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \ 246 "load=tftp ${loadaddr} ${u-boot}\0" \ 247 "loadmlo=tftp ${loadaddr} ${mlo}\0" \ 248 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \ 249 "uboot_addr=0x80000\0" \ 250 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ 251 "nand write ${loadaddr} ${uboot_addr} 80000\0" \ 252 "updatemlo=nandecc hw;nand erase 0 20000;" \ 253 "nand write ${loadaddr} 0 20000\0" \ 254 "upd=if run load;then echo Updating u-boot;if run update;" \ 255 "then echo U-Boot updated;" \ 256 "else echo Error updating u-boot !;" \ 257 "echo Board without bootloader !!;" \ 258 "fi;" \ 259 "else echo U-Boot not downloaded..exiting;fi\0" \ 260 261 /* 262 * this is common code for all TAM3517 boards. 263 * MAC address is stored from manufacturer in 264 * I2C EEPROM 265 */ 266 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) 267 /* 268 * The I2C EEPROM on the TAM3517 contains 269 * mac address and production data 270 */ 271 struct tam3517_module_info { 272 char customer[48]; 273 char product[48]; 274 275 /* 276 * bit 0~47 : sequence number 277 * bit 48~55 : week of year, from 0. 278 * bit 56~63 : year 279 */ 280 unsigned long long sequence_number; 281 282 /* 283 * bit 0~7 : revision fixed 284 * bit 8~15 : revision major 285 * bit 16~31 : TNxxx 286 */ 287 unsigned int revision; 288 unsigned char eth_addr[4][8]; 289 unsigned char _rev[100]; 290 }; 291 292 #define TAM3517_READ_EEPROM(info, ret) \ 293 do { \ 294 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \ 295 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \ 296 (void *)info, sizeof(*info))) \ 297 ret = 1; \ 298 else \ 299 ret = 0; \ 300 } while (0) 301 302 #define TAM3517_READ_MAC_FROM_EEPROM(info) \ 303 do { \ 304 char buf[80], ethname[20]; \ 305 int i; \ 306 memset(buf, 0, sizeof(buf)); \ 307 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \ 308 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \ 309 (info)->eth_addr[i][5], \ 310 (info)->eth_addr[i][4], \ 311 (info)->eth_addr[i][3], \ 312 (info)->eth_addr[i][2], \ 313 (info)->eth_addr[i][1], \ 314 (info)->eth_addr[i][0]); \ 315 \ 316 if (i) \ 317 sprintf(ethname, "eth%daddr", i); \ 318 else \ 319 strcpy(ethname, "ethaddr"); \ 320 printf("Setting %s from EEPROM with %s\n", ethname, buf);\ 321 env_set(ethname, buf); \ 322 } \ 323 } while (0) 324 325 /* The following macros are taken from Technexion's documentation */ 326 #define TAM3517_sequence_number(info) \ 327 ((info)->sequence_number % 0x1000000000000LL) 328 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100) 329 #define TAM3517_year(info) ((info)->sequence_number >> 56) 330 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100) 331 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100) 332 #define TAM3517_revision_tn(info) ((info)->revision >> 16) 333 334 #define TAM3517_PRINT_SOM_INFO(info) \ 335 do { \ 336 printf("Vendor:%s\n", (info)->customer); \ 337 printf("SOM: %s\n", (info)->product); \ 338 printf("SeqNr: %02llu%02llu%012llu\n", \ 339 TAM3517_year(info), \ 340 TAM3517_week_of_year(info), \ 341 TAM3517_sequence_number(info)); \ 342 printf("Rev: TN%u %u.%u\n", \ 343 TAM3517_revision_tn(info), \ 344 TAM3517_revision_major(info), \ 345 TAM3517_revision_fixed(info)); \ 346 } while (0) 347 348 #endif 349 350 #endif /* __TAM3517_H */ 351