1 /* 2 * Copyright (C) 2011 3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 4 * 5 * Copyright (C) 2009 TechNexion Ltd. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __TAM3517_H 11 #define __TAM3517_H 12 13 /* 14 * High Level Configuration Options 15 */ 16 17 #include <asm/arch/cpu.h> /* get chip and board defs */ 18 #include <asm/arch/omap.h> 19 20 /* Clock Defines */ 21 #define V_OSCK 26000000 /* Clock output from T2 */ 22 #define V_SCLK (V_OSCK >> 1) 23 24 #define CONFIG_MISC_INIT_R 25 26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 27 #define CONFIG_SETUP_MEMORY_TAGS 28 #define CONFIG_INITRD_TAG 29 #define CONFIG_REVISION_TAG 30 31 /* 32 * Size of malloc() pool 33 */ 34 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 35 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ 36 2 * 1024 * 1024) 37 /* 38 * DDR related 39 */ 40 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 41 42 /* 43 * Hardware drivers 44 */ 45 46 /* 47 * NS16550 Configuration 48 */ 49 #define CONFIG_SYS_NS16550_SERIAL 50 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 51 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 52 53 /* 54 * select serial console configuration 55 */ 56 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 57 #define CONFIG_SERIAL1 /* UART1 */ 58 59 /* allow to overwrite serial and ethaddr */ 60 #define CONFIG_ENV_OVERWRITE 61 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 62 115200} 63 /* EHCI */ 64 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 65 66 #define CONFIG_SYS_I2C 67 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ 68 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 69 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 70 71 /* 72 * Board NAND Info. 73 */ 74 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 75 /* to access */ 76 /* nand at CS0 */ 77 78 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 79 /* NAND devices */ 80 81 /* 82 * Miscellaneous configurable options 83 */ 84 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 85 86 #define CONFIG_SYS_MAXARGS 32 /* max number of command */ 87 /* args */ 88 /* memtest works on */ 89 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 90 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 91 0x01F00000) /* 31MB */ 92 93 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 94 /* address */ 95 96 /* 97 * AM3517 has 12 GP timers, they can be driven by the system clock 98 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 99 * This rate is divided by a local divisor. 100 */ 101 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 102 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 103 104 /* 105 * Physical Memory Map 106 */ 107 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 108 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 109 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 110 111 /* 112 * FLASH and environment organization 113 */ 114 115 /* **** PISMO SUPPORT *** */ 116 117 /* Redundant Environment */ 118 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 119 #define CONFIG_ENV_OFFSET 0x180000 120 #define CONFIG_ENV_ADDR 0x180000 121 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 122 2 * CONFIG_SYS_ENV_SECT_SIZE) 123 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 124 125 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 126 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 127 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 128 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 129 CONFIG_SYS_INIT_RAM_SIZE - \ 130 GENERATED_GBL_DATA_SIZE) 131 132 /* 133 * ethernet support, EMAC 134 * 135 */ 136 #define CONFIG_DRIVER_TI_EMAC 137 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 138 #define CONFIG_MII 139 #define CONFIG_BOOTP_DNS2 140 #define CONFIG_BOOTP_SEND_HOSTNAME 141 #define CONFIG_NET_RETRY_COUNT 10 142 143 /* Defines for SPL */ 144 #define CONFIG_SPL_CONSOLE 145 #define CONFIG_SPL_NAND_SOFTECC 146 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ 147 148 #define CONFIG_SPL_NAND_BASE 149 #define CONFIG_SPL_NAND_DRIVERS 150 #define CONFIG_SPL_NAND_ECC 151 152 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 153 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 154 CONFIG_SPL_TEXT_BASE) 155 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 156 157 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 158 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 159 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ 160 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 161 162 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 163 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 164 165 /* FAT */ 166 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 167 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 168 169 /* RAW SD card / eMMC */ 170 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ 171 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ 172 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ 173 174 /* NAND boot config */ 175 #define CONFIG_SYS_NAND_PAGE_COUNT 64 176 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 177 #define CONFIG_SYS_NAND_OOBSIZE 64 178 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 179 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 180 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 181 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 182 48, 49, 50, 51, 52, 53, 54, 55,\ 183 56, 57, 58, 59, 60, 61, 62, 63} 184 #define CONFIG_SYS_NAND_ECCSIZE 256 185 #define CONFIG_SYS_NAND_ECCBYTES 3 186 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 187 188 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 189 190 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 191 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 192 193 #define CONFIG_MTD_PARTITIONS 194 #define CONFIG_MTD_DEVICE 195 196 /* Setup MTD for NAND on the SOM */ 197 198 #define CONFIG_TAM3517_SETTINGS \ 199 "netdev=eth0\0" \ 200 "nandargs=setenv bootargs root=${nandroot} " \ 201 "rootfstype=${nandrootfstype}\0" \ 202 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 203 "nfsroot=${serverip}:${rootpath}\0" \ 204 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 205 "addip_sta=setenv bootargs ${bootargs} " \ 206 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 207 ":${hostname}:${netdev}:off panic=1\0" \ 208 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 209 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 210 "else run addip_sta;fi\0" \ 211 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 212 "addtty=setenv bootargs ${bootargs}" \ 213 " console=ttyO0,${baudrate}\0" \ 214 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 215 "loadaddr=82000000\0" \ 216 "kernel_addr_r=82000000\0" \ 217 "hostname=" CONFIG_HOSTNAME "\0" \ 218 "bootfile=" CONFIG_HOSTNAME "/uImage\0" \ 219 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 220 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 221 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 222 "bootm ${kernel_addr}\0" \ 223 "nandboot=run nandargs addip addtty addmtd addmisc;" \ 224 "nand read ${kernel_addr_r} kernel\0" \ 225 "bootm ${kernel_addr_r}\0" \ 226 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 227 "run nfsargs addip addtty addmtd addmisc;" \ 228 "bootm ${kernel_addr_r}\0" \ 229 "net_self=if run net_self_load;then " \ 230 "run ramargs addip addtty addmtd addmisc;" \ 231 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 232 "else echo Images not loades;fi\0" \ 233 "u-boot=" CONFIG_HOSTNAME "/u-boot.img\0" \ 234 "load=tftp ${loadaddr} ${u-boot}\0" \ 235 "loadmlo=tftp ${loadaddr} ${mlo}\0" \ 236 "mlo=" CONFIG_HOSTNAME "/MLO\0" \ 237 "uboot_addr=0x80000\0" \ 238 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ 239 "nand write ${loadaddr} ${uboot_addr} 80000\0" \ 240 "updatemlo=nandecc hw;nand erase 0 20000;" \ 241 "nand write ${loadaddr} 0 20000\0" \ 242 "upd=if run load;then echo Updating u-boot;if run update;" \ 243 "then echo U-Boot updated;" \ 244 "else echo Error updating u-boot !;" \ 245 "echo Board without bootloader !!;" \ 246 "fi;" \ 247 "else echo U-Boot not downloaded..exiting;fi\0" \ 248 249 /* 250 * this is common code for all TAM3517 boards. 251 * MAC address is stored from manufacturer in 252 * I2C EEPROM 253 */ 254 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) 255 /* 256 * The I2C EEPROM on the TAM3517 contains 257 * mac address and production data 258 */ 259 struct tam3517_module_info { 260 char customer[48]; 261 char product[48]; 262 263 /* 264 * bit 0~47 : sequence number 265 * bit 48~55 : week of year, from 0. 266 * bit 56~63 : year 267 */ 268 unsigned long long sequence_number; 269 270 /* 271 * bit 0~7 : revision fixed 272 * bit 8~15 : revision major 273 * bit 16~31 : TNxxx 274 */ 275 unsigned int revision; 276 unsigned char eth_addr[4][8]; 277 unsigned char _rev[100]; 278 }; 279 280 #define TAM3517_READ_EEPROM(info, ret) \ 281 do { \ 282 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \ 283 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \ 284 (void *)info, sizeof(*info))) \ 285 ret = 1; \ 286 else \ 287 ret = 0; \ 288 } while (0) 289 290 #define TAM3517_READ_MAC_FROM_EEPROM(info) \ 291 do { \ 292 char buf[80], ethname[20]; \ 293 int i; \ 294 memset(buf, 0, sizeof(buf)); \ 295 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \ 296 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \ 297 (info)->eth_addr[i][5], \ 298 (info)->eth_addr[i][4], \ 299 (info)->eth_addr[i][3], \ 300 (info)->eth_addr[i][2], \ 301 (info)->eth_addr[i][1], \ 302 (info)->eth_addr[i][0]); \ 303 \ 304 if (i) \ 305 sprintf(ethname, "eth%daddr", i); \ 306 else \ 307 strcpy(ethname, "ethaddr"); \ 308 printf("Setting %s from EEPROM with %s\n", ethname, buf);\ 309 env_set(ethname, buf); \ 310 } \ 311 } while (0) 312 313 /* The following macros are taken from Technexion's documentation */ 314 #define TAM3517_sequence_number(info) \ 315 ((info)->sequence_number % 0x1000000000000LL) 316 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100) 317 #define TAM3517_year(info) ((info)->sequence_number >> 56) 318 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100) 319 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100) 320 #define TAM3517_revision_tn(info) ((info)->revision >> 16) 321 322 #define TAM3517_PRINT_SOM_INFO(info) \ 323 do { \ 324 printf("Vendor:%s\n", (info)->customer); \ 325 printf("SOM: %s\n", (info)->product); \ 326 printf("SeqNr: %02llu%02llu%012llu\n", \ 327 TAM3517_year(info), \ 328 TAM3517_week_of_year(info), \ 329 TAM3517_sequence_number(info)); \ 330 printf("Rev: TN%u %u.%u\n", \ 331 TAM3517_revision_tn(info), \ 332 TAM3517_revision_major(info), \ 333 TAM3517_revision_fixed(info)); \ 334 } while (0) 335 336 #endif 337 338 #endif /* __TAM3517_H */ 339