1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2011 4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 5 * 6 * Copyright (C) 2009 TechNexion Ltd. 7 */ 8 9 #ifndef __TAM3517_H 10 #define __TAM3517_H 11 12 /* 13 * High Level Configuration Options 14 */ 15 16 #include <asm/arch/cpu.h> /* get chip and board defs */ 17 #include <asm/arch/omap.h> 18 19 /* Clock Defines */ 20 #define V_OSCK 26000000 /* Clock output from T2 */ 21 #define V_SCLK (V_OSCK >> 1) 22 23 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 24 #define CONFIG_SETUP_MEMORY_TAGS 25 #define CONFIG_INITRD_TAG 26 #define CONFIG_REVISION_TAG 27 28 /* 29 * Size of malloc() pool 30 */ 31 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 32 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ 33 2 * 1024 * 1024) 34 /* 35 * DDR related 36 */ 37 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 38 39 /* 40 * Hardware drivers 41 */ 42 43 /* 44 * NS16550 Configuration 45 */ 46 #define CONFIG_SYS_NS16550_SERIAL 47 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 48 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 49 50 /* 51 * select serial console configuration 52 */ 53 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 54 55 /* allow to overwrite serial and ethaddr */ 56 #define CONFIG_ENV_OVERWRITE 57 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 58 115200} 59 /* EHCI */ 60 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 61 62 #define CONFIG_SYS_I2C 63 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ 64 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 65 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 66 67 /* 68 * Board NAND Info. 69 */ 70 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 71 /* to access */ 72 /* nand at CS0 */ 73 74 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 75 /* NAND devices */ 76 77 /* 78 * Miscellaneous configurable options 79 */ 80 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 81 82 #define CONFIG_SYS_MAXARGS 32 /* max number of command */ 83 /* args */ 84 /* memtest works on */ 85 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 86 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 87 0x01F00000) /* 31MB */ 88 89 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 90 /* address */ 91 92 /* 93 * AM3517 has 12 GP timers, they can be driven by the system clock 94 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 95 * This rate is divided by a local divisor. 96 */ 97 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 98 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 99 100 /* 101 * Physical Memory Map 102 */ 103 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 104 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 105 106 /* 107 * FLASH and environment organization 108 */ 109 110 /* **** PISMO SUPPORT *** */ 111 112 /* Redundant Environment */ 113 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 114 #define CONFIG_ENV_OFFSET 0x180000 115 #define CONFIG_ENV_ADDR 0x180000 116 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 117 2 * CONFIG_SYS_ENV_SECT_SIZE) 118 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 119 120 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 121 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 122 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 123 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 124 CONFIG_SYS_INIT_RAM_SIZE - \ 125 GENERATED_GBL_DATA_SIZE) 126 127 /* 128 * ethernet support, EMAC 129 * 130 */ 131 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 132 #define CONFIG_BOOTP_DNS2 133 #define CONFIG_BOOTP_SEND_HOSTNAME 134 #define CONFIG_NET_RETRY_COUNT 10 135 136 /* Defines for SPL */ 137 #define CONFIG_SPL_CONSOLE 138 #define CONFIG_SPL_NAND_SOFTECC 139 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ 140 141 #define CONFIG_SPL_NAND_BASE 142 #define CONFIG_SPL_NAND_DRIVERS 143 #define CONFIG_SPL_NAND_ECC 144 145 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 146 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 147 CONFIG_SPL_TEXT_BASE) 148 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 149 150 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 151 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 152 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ 153 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 154 155 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 156 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 157 158 /* FAT */ 159 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 160 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 161 162 /* RAW SD card / eMMC */ 163 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ 164 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ 165 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ 166 167 /* NAND boot config */ 168 #define CONFIG_SYS_NAND_PAGE_COUNT 64 169 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 170 #define CONFIG_SYS_NAND_OOBSIZE 64 171 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 172 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 173 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 174 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 175 48, 49, 50, 51, 52, 53, 54, 55,\ 176 56, 57, 58, 59, 60, 61, 62, 63} 177 #define CONFIG_SYS_NAND_ECCSIZE 256 178 #define CONFIG_SYS_NAND_ECCBYTES 3 179 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 180 181 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 182 183 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 184 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 185 186 /* Setup MTD for NAND on the SOM */ 187 188 #define CONFIG_TAM3517_SETTINGS \ 189 "netdev=eth0\0" \ 190 "nandargs=setenv bootargs root=${nandroot} " \ 191 "rootfstype=${nandrootfstype}\0" \ 192 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 193 "nfsroot=${serverip}:${rootpath}\0" \ 194 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 195 "addip_sta=setenv bootargs ${bootargs} " \ 196 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 197 ":${hostname}:${netdev}:off panic=1\0" \ 198 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 199 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 200 "else run addip_sta;fi\0" \ 201 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 202 "addtty=setenv bootargs ${bootargs}" \ 203 " console=ttyO0,${baudrate}\0" \ 204 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 205 "loadaddr=82000000\0" \ 206 "kernel_addr_r=82000000\0" \ 207 "hostname=" CONFIG_HOSTNAME "\0" \ 208 "bootfile=" CONFIG_HOSTNAME "/uImage\0" \ 209 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 210 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 211 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 212 "bootm ${kernel_addr}\0" \ 213 "nandboot=run nandargs addip addtty addmtd addmisc;" \ 214 "nand read ${kernel_addr_r} kernel\0" \ 215 "bootm ${kernel_addr_r}\0" \ 216 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 217 "run nfsargs addip addtty addmtd addmisc;" \ 218 "bootm ${kernel_addr_r}\0" \ 219 "net_self=if run net_self_load;then " \ 220 "run ramargs addip addtty addmtd addmisc;" \ 221 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 222 "else echo Images not loades;fi\0" \ 223 "u-boot=" CONFIG_HOSTNAME "/u-boot.img\0" \ 224 "load=tftp ${loadaddr} ${u-boot}\0" \ 225 "loadmlo=tftp ${loadaddr} ${mlo}\0" \ 226 "mlo=" CONFIG_HOSTNAME "/MLO\0" \ 227 "uboot_addr=0x80000\0" \ 228 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ 229 "nand write ${loadaddr} ${uboot_addr} 80000\0" \ 230 "updatemlo=nandecc hw;nand erase 0 20000;" \ 231 "nand write ${loadaddr} 0 20000\0" \ 232 "upd=if run load;then echo Updating u-boot;if run update;" \ 233 "then echo U-Boot updated;" \ 234 "else echo Error updating u-boot !;" \ 235 "echo Board without bootloader !!;" \ 236 "fi;" \ 237 "else echo U-Boot not downloaded..exiting;fi\0" \ 238 239 /* 240 * this is common code for all TAM3517 boards. 241 * MAC address is stored from manufacturer in 242 * I2C EEPROM 243 */ 244 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) 245 /* 246 * The I2C EEPROM on the TAM3517 contains 247 * mac address and production data 248 */ 249 struct tam3517_module_info { 250 char customer[48]; 251 char product[48]; 252 253 /* 254 * bit 0~47 : sequence number 255 * bit 48~55 : week of year, from 0. 256 * bit 56~63 : year 257 */ 258 unsigned long long sequence_number; 259 260 /* 261 * bit 0~7 : revision fixed 262 * bit 8~15 : revision major 263 * bit 16~31 : TNxxx 264 */ 265 unsigned int revision; 266 unsigned char eth_addr[4][8]; 267 unsigned char _rev[100]; 268 }; 269 270 #define TAM3517_READ_EEPROM(info, ret) \ 271 do { \ 272 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \ 273 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \ 274 (void *)info, sizeof(*info))) \ 275 ret = 1; \ 276 else \ 277 ret = 0; \ 278 } while (0) 279 280 #define TAM3517_READ_MAC_FROM_EEPROM(info) \ 281 do { \ 282 char buf[80], ethname[20]; \ 283 int i; \ 284 memset(buf, 0, sizeof(buf)); \ 285 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \ 286 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \ 287 (info)->eth_addr[i][5], \ 288 (info)->eth_addr[i][4], \ 289 (info)->eth_addr[i][3], \ 290 (info)->eth_addr[i][2], \ 291 (info)->eth_addr[i][1], \ 292 (info)->eth_addr[i][0]); \ 293 \ 294 if (i) \ 295 sprintf(ethname, "eth%daddr", i); \ 296 else \ 297 strcpy(ethname, "ethaddr"); \ 298 printf("Setting %s from EEPROM with %s\n", ethname, buf);\ 299 env_set(ethname, buf); \ 300 } \ 301 } while (0) 302 303 /* The following macros are taken from Technexion's documentation */ 304 #define TAM3517_sequence_number(info) \ 305 ((info)->sequence_number % 0x1000000000000LL) 306 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100) 307 #define TAM3517_year(info) ((info)->sequence_number >> 56) 308 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100) 309 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100) 310 #define TAM3517_revision_tn(info) ((info)->revision >> 16) 311 312 #define TAM3517_PRINT_SOM_INFO(info) \ 313 do { \ 314 printf("Vendor:%s\n", (info)->customer); \ 315 printf("SOM: %s\n", (info)->product); \ 316 printf("SeqNr: %02llu%02llu%012llu\n", \ 317 TAM3517_year(info), \ 318 TAM3517_week_of_year(info), \ 319 TAM3517_sequence_number(info)); \ 320 printf("Rev: TN%u %u.%u\n", \ 321 TAM3517_revision_tn(info), \ 322 TAM3517_revision_major(info), \ 323 TAM3517_revision_fixed(info)); \ 324 } while (0) 325 326 #endif 327 328 #endif /* __TAM3517_H */ 329