xref: /openbmc/u-boot/include/configs/tam3517-common.h (revision 0f44d33536a50ef65259c322fa2d4a058585caf9)
1 /*
2  * Copyright (C) 2011
3  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4  *
5  * Copyright (C) 2009 TechNexion Ltd.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __TAM3517_H
11 #define __TAM3517_H
12 
13 /*
14  * High Level Configuration Options
15  */
16 
17 #include <asm/arch/cpu.h>		/* get chip and board defs */
18 #include <asm/arch/omap.h>
19 
20 /* Clock Defines */
21 #define V_OSCK			26000000	/* Clock output from T2 */
22 #define V_SCLK			(V_OSCK >> 1)
23 
24 #define CONFIG_MISC_INIT_R
25 
26 #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
27 #define CONFIG_SETUP_MEMORY_TAGS
28 #define CONFIG_INITRD_TAG
29 #define CONFIG_REVISION_TAG
30 
31 /*
32  * Size of malloc() pool
33  */
34 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB sector */
35 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10) + \
36 					2 * 1024 * 1024)
37 /*
38  * DDR related
39  */
40 #define CONFIG_SYS_CS0_SIZE		(256 * 1024 * 1024)
41 
42 /*
43  * Hardware drivers
44  */
45 
46 /*
47  * NS16550 Configuration
48  */
49 #define CONFIG_SYS_NS16550_SERIAL
50 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
51 #define CONFIG_SYS_NS16550_CLK		48000000	/* 48MHz (APLL96/2) */
52 
53 /*
54  * select serial console configuration
55  */
56 #define CONFIG_CONS_INDEX		1
57 #define CONFIG_SYS_NS16550_COM1		OMAP34XX_UART1
58 #define CONFIG_SERIAL1			/* UART1 */
59 
60 /* allow to overwrite serial and ethaddr */
61 #define CONFIG_ENV_OVERWRITE
62 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
63 					115200}
64 /* EHCI */
65 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	25
66 
67 #define CONFIG_SYS_I2C
68 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50		/* base address */
69 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1		/* bytes of address */
70 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	0x07
71 
72 /*
73  * Board NAND Info.
74  */
75 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
76 							/* to access */
77 							/* nand at CS0 */
78 
79 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of */
80 							/* NAND devices */
81 
82 #define CONFIG_AUTO_COMPLETE
83 
84 /*
85  * Miscellaneous configurable options
86  */
87 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
88 #define CONFIG_CMDLINE_EDITING
89 #define CONFIG_AUTO_COMPLETE
90 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
91 
92 #define CONFIG_SYS_MAXARGS		32	/* max number of command */
93 						/* args */
94 /* memtest works on */
95 #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
96 #define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
97 					0x01F00000) /* 31MB */
98 
99 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
100 								/* address */
101 
102 /*
103  * AM3517 has 12 GP timers, they can be driven by the system clock
104  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
105  * This rate is divided by a local divisor.
106  */
107 #define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
108 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
109 
110 /*
111  * Physical Memory Map
112  */
113 #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
114 #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
115 #define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
116 
117 /*
118  * FLASH and environment organization
119  */
120 
121 /* **** PISMO SUPPORT *** */
122 
123 /* Redundant Environment */
124 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
125 #define CONFIG_ENV_OFFSET		0x180000
126 #define CONFIG_ENV_ADDR			0x180000
127 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + \
128 						2 * CONFIG_SYS_ENV_SECT_SIZE)
129 #define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
130 
131 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
132 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
133 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
134 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
135 					 CONFIG_SYS_INIT_RAM_SIZE - \
136 					 GENERATED_GBL_DATA_SIZE)
137 
138 /*
139  * ethernet support, EMAC
140  *
141  */
142 #define CONFIG_DRIVER_TI_EMAC
143 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
144 #define CONFIG_MII
145 #define CONFIG_BOOTP_DNS
146 #define CONFIG_BOOTP_DNS2
147 #define CONFIG_BOOTP_SEND_HOSTNAME
148 #define CONFIG_NET_RETRY_COUNT 10
149 
150 /* Defines for SPL */
151 #define CONFIG_SPL_CONSOLE
152 #define CONFIG_SPL_NAND_SOFTECC
153 #define CONFIG_SPL_NAND_WORKSPACE	0x8f07f000 /* below BSS */
154 
155 #define CONFIG_SPL_NAND_BASE
156 #define CONFIG_SPL_NAND_DRIVERS
157 #define CONFIG_SPL_NAND_ECC
158 
159 #define CONFIG_SPL_TEXT_BASE		0x40200000 /*CONFIG_SYS_SRAM_START*/
160 #define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - \
161 					 CONFIG_SPL_TEXT_BASE)
162 #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
163 
164 #define CONFIG_SYS_SPL_MALLOC_START	0x8f000000
165 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
166 #define CONFIG_SPL_BSS_START_ADDR	0x8f080000 /* end of RAM */
167 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
168 
169 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
170 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
171 
172 /* FAT */
173 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"
174 #define CONFIG_SPL_FS_LOAD_ARGS_NAME		"args"
175 
176 /* RAW SD card / eMMC */
177 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x900	/* address 0x120000 */
178 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x80	/* address 0x10000 */
179 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0x80	/* 64KiB */
180 
181 /* NAND boot config */
182 #define CONFIG_SYS_NAND_PAGE_COUNT	64
183 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
184 #define CONFIG_SYS_NAND_OOBSIZE		64
185 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
186 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
187 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
188 #define CONFIG_SYS_NAND_ECCPOS		{40, 41, 42, 43, 44, 45, 46, 47,\
189 					 48, 49, 50, 51, 52, 53, 54, 55,\
190 					 56, 57, 58, 59, 60, 61, 62, 63}
191 #define CONFIG_SYS_NAND_ECCSIZE		256
192 #define CONFIG_SYS_NAND_ECCBYTES	3
193 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_SW
194 
195 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
196 
197 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
198 #define CONFIG_SYS_NAND_U_BOOT_SIZE	0x80000
199 
200 #define CONFIG_MTD_PARTITIONS
201 #define CONFIG_MTD_DEVICE
202 
203 /* Setup MTD for NAND on the SOM */
204 
205 #define	CONFIG_TAM3517_SETTINGS						\
206 	"netdev=eth0\0"							\
207 	"nandargs=setenv bootargs root=${nandroot} "			\
208 		"rootfstype=${nandrootfstype}\0"			\
209 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
210 		"nfsroot=${serverip}:${rootpath}\0"			\
211 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
212 	"addip_sta=setenv bootargs ${bootargs} "			\
213 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
214 		":${hostname}:${netdev}:off panic=1\0"			\
215 	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
216 	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
217 		"else run addip_sta;fi\0"				\
218 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
219 	"addtty=setenv bootargs ${bootargs}"				\
220 		" console=ttyO0,${baudrate}\0"				\
221 	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
222 	"loadaddr=82000000\0"						\
223 	"kernel_addr_r=82000000\0"					\
224 	"hostname=" __stringify(CONFIG_HOSTNAME) "\0"			\
225 	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
226 	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
227 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
228 	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
229 		"bootm ${kernel_addr}\0"				\
230 	"nandboot=run nandargs addip addtty addmtd addmisc;"		\
231 		"nand read ${kernel_addr_r} kernel\0"			\
232 		"bootm ${kernel_addr_r}\0"				\
233 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
234 		"run nfsargs addip addtty addmtd addmisc;"		\
235 		"bootm ${kernel_addr_r}\0"				\
236 	"net_self=if run net_self_load;then "				\
237 		"run ramargs addip addtty addmtd addmisc;"		\
238 		"bootm ${kernel_addr_r} ${ramdisk_addr_r};"		\
239 		"else echo Images not loades;fi\0"			\
240 	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0"		\
241 	"load=tftp ${loadaddr} ${u-boot}\0"				\
242 	"loadmlo=tftp ${loadaddr} ${mlo}\0"				\
243 	"mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0"			\
244 	"uboot_addr=0x80000\0"						\
245 	"update=nandecc sw;nand erase ${uboot_addr} 100000;"		\
246 		"nand write ${loadaddr} ${uboot_addr} 80000\0"		\
247 	"updatemlo=nandecc hw;nand erase 0 20000;"			\
248 		"nand write ${loadaddr} 0 20000\0"			\
249 	"upd=if run load;then echo Updating u-boot;if run update;"	\
250 		"then echo U-Boot updated;"				\
251 			"else echo Error updating u-boot !;"		\
252 			"echo Board without bootloader !!;"		\
253 		"fi;"							\
254 		"else echo U-Boot not downloaded..exiting;fi\0"		\
255 
256 /*
257  * this is common code for all TAM3517 boards.
258  * MAC address is stored from manufacturer in
259  * I2C EEPROM
260  */
261 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
262 /*
263  * The I2C EEPROM on the TAM3517 contains
264  * mac address and production data
265  */
266 struct tam3517_module_info {
267 	char customer[48];
268 	char product[48];
269 
270 	/*
271 	 * bit 0~47  : sequence number
272 	 * bit 48~55 : week of year, from 0.
273 	 * bit 56~63 : year
274 	 */
275 	unsigned long long sequence_number;
276 
277 	/*
278 	 * bit 0~7   : revision fixed
279 	 * bit 8~15  : revision major
280 	 * bit 16~31 : TNxxx
281 	 */
282 	unsigned int revision;
283 	unsigned char eth_addr[4][8];
284 	unsigned char _rev[100];
285 };
286 
287 #define TAM3517_READ_EEPROM(info, ret) \
288 do {								\
289 	i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
290 	if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,		\
291 		(void *)info, sizeof(*info)))			\
292 		ret = 1;					\
293 	else							\
294 		ret = 0;					\
295 } while (0)
296 
297 #define TAM3517_READ_MAC_FROM_EEPROM(info)			\
298 do {								\
299 	char buf[80], ethname[20];				\
300 	int i;							\
301 	memset(buf, 0, sizeof(buf));				\
302 	for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) {	\
303 		sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X",	\
304 			(info)->eth_addr[i][5],			\
305 			(info)->eth_addr[i][4],			\
306 			(info)->eth_addr[i][3],			\
307 			(info)->eth_addr[i][2],			\
308 			(info)->eth_addr[i][1],			\
309 			(info)->eth_addr[i][0]);			\
310 								\
311 		if (i)						\
312 			sprintf(ethname, "eth%daddr", i);	\
313 		else						\
314 			strcpy(ethname, "ethaddr");		\
315 		printf("Setting %s from EEPROM with %s\n", ethname, buf);\
316 		env_set(ethname, buf);				\
317 	}							\
318 } while (0)
319 
320 /* The following macros are taken from Technexion's documentation */
321 #define TAM3517_sequence_number(info) \
322 	((info)->sequence_number % 0x1000000000000LL)
323 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
324 #define TAM3517_year(info) ((info)->sequence_number >> 56)
325 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
326 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
327 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
328 
329 #define TAM3517_PRINT_SOM_INFO(info)				\
330 do {								\
331 	printf("Vendor:%s\n", (info)->customer);		\
332 	printf("SOM:   %s\n", (info)->product);			\
333 	printf("SeqNr: %02llu%02llu%012llu\n",			\
334 		TAM3517_year(info),				\
335 		TAM3517_week_of_year(info),			\
336 		TAM3517_sequence_number(info));			\
337 	printf("Rev:   TN%u %u.%u\n",				\
338 		TAM3517_revision_tn(info),			\
339 		TAM3517_revision_major(info),			\
340 		TAM3517_revision_fixed(info));			\
341 } while (0)
342 
343 #endif
344 
345 #endif /* __TAM3517_H */
346