1 /* 2 * Copyright (C) 2011 3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 4 * 5 * Copyright (C) 2009 TechNexion Ltd. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __TAM3517_H 11 #define __TAM3517_H 12 13 /* 14 * High Level Configuration Options 15 */ 16 17 #define CONFIG_SYS_TEXT_BASE 0x80008000 18 19 #include <asm/arch/cpu.h> /* get chip and board defs */ 20 #include <asm/arch/omap.h> 21 22 /* Clock Defines */ 23 #define V_OSCK 26000000 /* Clock output from T2 */ 24 #define V_SCLK (V_OSCK >> 1) 25 26 #define CONFIG_MISC_INIT_R 27 28 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 29 #define CONFIG_SETUP_MEMORY_TAGS 30 #define CONFIG_INITRD_TAG 31 #define CONFIG_REVISION_TAG 32 33 /* 34 * Size of malloc() pool 35 */ 36 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 37 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ 38 2 * 1024 * 1024) 39 /* 40 * DDR related 41 */ 42 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 43 44 /* 45 * Hardware drivers 46 */ 47 48 /* 49 * NS16550 Configuration 50 */ 51 #define CONFIG_SYS_NS16550_SERIAL 52 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 53 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 54 55 /* 56 * select serial console configuration 57 */ 58 #define CONFIG_CONS_INDEX 1 59 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 60 #define CONFIG_SERIAL1 /* UART1 */ 61 62 /* allow to overwrite serial and ethaddr */ 63 #define CONFIG_ENV_OVERWRITE 64 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 65 115200} 66 /* EHCI */ 67 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 68 69 #define CONFIG_SYS_I2C 70 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ 71 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 72 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 73 74 /* 75 * Board NAND Info. 76 */ 77 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 78 /* to access */ 79 /* nand at CS0 */ 80 81 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 82 /* NAND devices */ 83 84 #define CONFIG_AUTO_COMPLETE 85 86 /* 87 * Miscellaneous configurable options 88 */ 89 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 90 #define CONFIG_CMDLINE_EDITING 91 #define CONFIG_AUTO_COMPLETE 92 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 93 94 #define CONFIG_SYS_MAXARGS 32 /* max number of command */ 95 /* args */ 96 /* memtest works on */ 97 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 98 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 99 0x01F00000) /* 31MB */ 100 101 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 102 /* address */ 103 104 /* 105 * AM3517 has 12 GP timers, they can be driven by the system clock 106 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 107 * This rate is divided by a local divisor. 108 */ 109 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 110 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 111 112 /* 113 * Physical Memory Map 114 */ 115 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 116 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 117 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 118 119 /* 120 * FLASH and environment organization 121 */ 122 123 /* **** PISMO SUPPORT *** */ 124 125 /* Redundant Environment */ 126 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 127 #define CONFIG_ENV_OFFSET 0x180000 128 #define CONFIG_ENV_ADDR 0x180000 129 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 130 2 * CONFIG_SYS_ENV_SECT_SIZE) 131 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 132 133 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 134 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 135 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 136 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 137 CONFIG_SYS_INIT_RAM_SIZE - \ 138 GENERATED_GBL_DATA_SIZE) 139 140 /* 141 * ethernet support, EMAC 142 * 143 */ 144 #define CONFIG_DRIVER_TI_EMAC 145 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 146 #define CONFIG_MII 147 #define CONFIG_BOOTP_DNS 148 #define CONFIG_BOOTP_DNS2 149 #define CONFIG_BOOTP_SEND_HOSTNAME 150 #define CONFIG_NET_RETRY_COUNT 10 151 152 /* Defines for SPL */ 153 #define CONFIG_SPL_FRAMEWORK 154 #define CONFIG_SPL_CONSOLE 155 #define CONFIG_SPL_NAND_SOFTECC 156 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ 157 158 #define CONFIG_SPL_NAND_BASE 159 #define CONFIG_SPL_NAND_DRIVERS 160 #define CONFIG_SPL_NAND_ECC 161 162 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 163 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 164 CONFIG_SPL_TEXT_BASE) 165 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 166 167 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 168 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 169 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ 170 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 171 172 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 173 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 174 175 /* FAT */ 176 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 177 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 178 179 /* RAW SD card / eMMC */ 180 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ 181 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ 182 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ 183 184 /* NAND boot config */ 185 #define CONFIG_SYS_NAND_PAGE_COUNT 64 186 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 187 #define CONFIG_SYS_NAND_OOBSIZE 64 188 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 189 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 190 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 191 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 192 48, 49, 50, 51, 52, 53, 54, 55,\ 193 56, 57, 58, 59, 60, 61, 62, 63} 194 #define CONFIG_SYS_NAND_ECCSIZE 256 195 #define CONFIG_SYS_NAND_ECCBYTES 3 196 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 197 198 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 199 200 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 201 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 202 203 #define CONFIG_MTD_PARTITIONS 204 #define CONFIG_MTD_DEVICE 205 206 /* Setup MTD for NAND on the SOM */ 207 208 #define CONFIG_TAM3517_SETTINGS \ 209 "netdev=eth0\0" \ 210 "nandargs=setenv bootargs root=${nandroot} " \ 211 "rootfstype=${nandrootfstype}\0" \ 212 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 213 "nfsroot=${serverip}:${rootpath}\0" \ 214 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 215 "addip_sta=setenv bootargs ${bootargs} " \ 216 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 217 ":${hostname}:${netdev}:off panic=1\0" \ 218 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 219 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 220 "else run addip_sta;fi\0" \ 221 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 222 "addtty=setenv bootargs ${bootargs}" \ 223 " console=ttyO0,${baudrate}\0" \ 224 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 225 "loadaddr=82000000\0" \ 226 "kernel_addr_r=82000000\0" \ 227 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 228 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 229 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 230 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 231 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 232 "bootm ${kernel_addr}\0" \ 233 "nandboot=run nandargs addip addtty addmtd addmisc;" \ 234 "nand read ${kernel_addr_r} kernel\0" \ 235 "bootm ${kernel_addr_r}\0" \ 236 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 237 "run nfsargs addip addtty addmtd addmisc;" \ 238 "bootm ${kernel_addr_r}\0" \ 239 "net_self=if run net_self_load;then " \ 240 "run ramargs addip addtty addmtd addmisc;" \ 241 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 242 "else echo Images not loades;fi\0" \ 243 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \ 244 "load=tftp ${loadaddr} ${u-boot}\0" \ 245 "loadmlo=tftp ${loadaddr} ${mlo}\0" \ 246 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \ 247 "uboot_addr=0x80000\0" \ 248 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ 249 "nand write ${loadaddr} ${uboot_addr} 80000\0" \ 250 "updatemlo=nandecc hw;nand erase 0 20000;" \ 251 "nand write ${loadaddr} 0 20000\0" \ 252 "upd=if run load;then echo Updating u-boot;if run update;" \ 253 "then echo U-Boot updated;" \ 254 "else echo Error updating u-boot !;" \ 255 "echo Board without bootloader !!;" \ 256 "fi;" \ 257 "else echo U-Boot not downloaded..exiting;fi\0" \ 258 259 /* 260 * this is common code for all TAM3517 boards. 261 * MAC address is stored from manufacturer in 262 * I2C EEPROM 263 */ 264 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) 265 /* 266 * The I2C EEPROM on the TAM3517 contains 267 * mac address and production data 268 */ 269 struct tam3517_module_info { 270 char customer[48]; 271 char product[48]; 272 273 /* 274 * bit 0~47 : sequence number 275 * bit 48~55 : week of year, from 0. 276 * bit 56~63 : year 277 */ 278 unsigned long long sequence_number; 279 280 /* 281 * bit 0~7 : revision fixed 282 * bit 8~15 : revision major 283 * bit 16~31 : TNxxx 284 */ 285 unsigned int revision; 286 unsigned char eth_addr[4][8]; 287 unsigned char _rev[100]; 288 }; 289 290 #define TAM3517_READ_EEPROM(info, ret) \ 291 do { \ 292 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \ 293 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \ 294 (void *)info, sizeof(*info))) \ 295 ret = 1; \ 296 else \ 297 ret = 0; \ 298 } while (0) 299 300 #define TAM3517_READ_MAC_FROM_EEPROM(info) \ 301 do { \ 302 char buf[80], ethname[20]; \ 303 int i; \ 304 memset(buf, 0, sizeof(buf)); \ 305 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \ 306 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \ 307 (info)->eth_addr[i][5], \ 308 (info)->eth_addr[i][4], \ 309 (info)->eth_addr[i][3], \ 310 (info)->eth_addr[i][2], \ 311 (info)->eth_addr[i][1], \ 312 (info)->eth_addr[i][0]); \ 313 \ 314 if (i) \ 315 sprintf(ethname, "eth%daddr", i); \ 316 else \ 317 strcpy(ethname, "ethaddr"); \ 318 printf("Setting %s from EEPROM with %s\n", ethname, buf);\ 319 env_set(ethname, buf); \ 320 } \ 321 } while (0) 322 323 /* The following macros are taken from Technexion's documentation */ 324 #define TAM3517_sequence_number(info) \ 325 ((info)->sequence_number % 0x1000000000000LL) 326 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100) 327 #define TAM3517_year(info) ((info)->sequence_number >> 56) 328 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100) 329 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100) 330 #define TAM3517_revision_tn(info) ((info)->revision >> 16) 331 332 #define TAM3517_PRINT_SOM_INFO(info) \ 333 do { \ 334 printf("Vendor:%s\n", (info)->customer); \ 335 printf("SOM: %s\n", (info)->product); \ 336 printf("SeqNr: %02llu%02llu%012llu\n", \ 337 TAM3517_year(info), \ 338 TAM3517_week_of_year(info), \ 339 TAM3517_sequence_number(info)); \ 340 printf("Rev: TN%u %u.%u\n", \ 341 TAM3517_revision_tn(info), \ 342 TAM3517_revision_major(info), \ 343 TAM3517_revision_fixed(info)); \ 344 } while (0) 345 346 #endif 347 348 #endif /* __TAM3517_H */ 349