1 /* 2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3 * 4 * (C) Copyright 2007-2011 5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6 * Tom Cubie <tangliang@allwinnertech.com> 7 * 8 * Configuration settings for the Allwinner sunxi series of boards. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef _SUNXI_COMMON_CONFIG_H 14 #define _SUNXI_COMMON_CONFIG_H 15 16 /* 17 * High Level Configuration Options 18 */ 19 #define CONFIG_SUNXI /* sunxi family */ 20 #ifdef CONFIG_SPL_BUILD 21 #ifndef CONFIG_SPL_FEL 22 #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 23 #endif 24 #endif 25 26 #include <asm/arch/cpu.h> /* get chip and board defs */ 27 28 #define CONFIG_SYS_TEXT_BASE 0x4a000000 29 30 /* 31 * Display CPU information 32 */ 33 #define CONFIG_DISPLAY_CPUINFO 34 35 /* Serial & console */ 36 #define CONFIG_SYS_NS16550 37 #define CONFIG_SYS_NS16550_SERIAL 38 /* ns16550 reg in the low bits of cpu reg */ 39 #define CONFIG_SYS_NS16550_REG_SIZE -4 40 #define CONFIG_SYS_NS16550_CLK 24000000 41 #define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 42 #define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 43 #define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 44 #define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 45 46 /* DRAM Base */ 47 #define CONFIG_SYS_SDRAM_BASE 0x40000000 48 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 49 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 50 51 #define CONFIG_SYS_INIT_SP_OFFSET \ 52 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 53 #define CONFIG_SYS_INIT_SP_ADDR \ 54 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 55 56 #define CONFIG_NR_DRAM_BANKS 1 57 #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 58 #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 59 60 #define CONFIG_CMD_MEMORY 61 #define CONFIG_CMD_SETEXPR 62 63 #define CONFIG_SETUP_MEMORY_TAGS 64 #define CONFIG_CMDLINE_TAG 65 #define CONFIG_INITRD_TAG 66 67 /* mmc config */ 68 #define CONFIG_MMC 69 #define CONFIG_GENERIC_MMC 70 #define CONFIG_CMD_MMC 71 #define CONFIG_MMC_SUNXI 72 #define CONFIG_MMC_SUNXI_SLOT 0 73 #define CONFIG_MMC_SUNXI_USE_DMA 74 #define CONFIG_ENV_IS_IN_MMC 75 #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 76 77 /* 4MB of malloc() pool */ 78 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 79 80 /* 81 * Miscellaneous configurable options 82 */ 83 #define CONFIG_CMD_ECHO 84 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 85 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 86 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 87 #define CONFIG_SYS_GENERIC_BOARD 88 89 /* Boot Argument Buffer Size */ 90 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 91 92 #define CONFIG_SYS_LOAD_ADDR 0x48000000 /* default load address */ 93 94 /* standalone support */ 95 #define CONFIG_STANDALONE_LOAD_ADDR 0x48000000 96 97 #define CONFIG_SYS_HZ 1000 98 99 /* baudrate */ 100 #define CONFIG_BAUDRATE 115200 101 102 /* The stack sizes are set up in start.S using the settings below */ 103 #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 104 105 /* FLASH and environment organization */ 106 107 #define CONFIG_SYS_NO_FLASH 108 109 #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */ 110 #define CONFIG_IDENT_STRING " Allwinner Technology" 111 112 #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 113 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 114 115 #define CONFIG_EXTRA_ENV_SETTINGS \ 116 "bootm_size=0x10000000\0" 117 118 #define CONFIG_SYS_BOOT_GET_CMDLINE 119 120 #include <config_cmd_default.h> 121 122 #define CONFIG_FAT_WRITE /* enable write access */ 123 124 #define CONFIG_SPL_FRAMEWORK 125 #define CONFIG_SPL_LIBCOMMON_SUPPORT 126 #define CONFIG_SPL_SERIAL_SUPPORT 127 #define CONFIG_SPL_LIBGENERIC_SUPPORT 128 129 #ifdef CONFIG_SPL_FEL 130 131 #define CONFIG_SPL 132 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds" 133 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi" 134 #define CONFIG_SPL_TEXT_BASE 0x2000 135 #define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */ 136 137 #else /* CONFIG_SPL */ 138 139 #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 140 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */ 141 142 #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 143 #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 144 145 #define CONFIG_SPL_LIBDISK_SUPPORT 146 #define CONFIG_SPL_MMC_SUPPORT 147 148 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 149 150 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 151 #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 152 153 #endif /* CONFIG_SPL */ 154 155 /* end of 32 KiB in sram */ 156 #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 157 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 158 #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 159 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ 160 161 #undef CONFIG_CMD_FPGA 162 #undef CONFIG_CMD_NET 163 #undef CONFIG_CMD_NFS 164 165 #define CONFIG_CONS_INDEX 1 /* UART0 */ 166 167 #ifdef CONFIG_SUNXI_GMAC 168 #define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */ 169 #define CONFIG_DW_AUTONEG 170 #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 171 #define CONFIG_PHY_ADDR 1 172 #define CONFIG_MII /* MII PHY management */ 173 #define CONFIG_PHYLIB 174 #endif 175 176 #ifdef CONFIG_CMD_NET 177 #define CONFIG_CMD_NFS 178 #define CONFIG_CMD_DNS 179 #define CONFIG_NETCONSOLE 180 #define CONFIG_BOOTP_DNS2 181 #define CONFIG_BOOTP_SEND_HOSTNAME 182 #endif 183 184 #if !defined CONFIG_ENV_IS_IN_MMC && \ 185 !defined CONFIG_ENV_IS_IN_NAND && \ 186 !defined CONFIG_ENV_IS_IN_FAT && \ 187 !defined CONFIG_ENV_IS_IN_SPI_FLASH 188 #define CONFIG_ENV_IS_NOWHERE 189 #endif 190 191 #ifndef CONFIG_SPL_BUILD 192 #include <config_distro_defaults.h> 193 #endif 194 195 #endif /* _SUNXI_COMMON_CONFIG_H */ 196