1 /*
2  * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3  *
4  * (C) Copyright 2007-2011
5  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6  * Tom Cubie <tangliang@allwinnertech.com>
7  *
8  * Configuration settings for the Allwinner sunxi series of boards.
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef _SUNXI_COMMON_CONFIG_H
14 #define _SUNXI_COMMON_CONFIG_H
15 
16 #include <asm/arch/cpu.h>
17 #include <linux/stringify.h>
18 
19 #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
20 /*
21  * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
22  * expense of restricting some features, so the regular machine id values can
23  * be used.
24  */
25 # define CONFIG_MACH_TYPE_COMPAT_REV	0
26 #else
27 /*
28  * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
29  * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
30  * beyond the machine id check.
31  */
32 # define CONFIG_MACH_TYPE_COMPAT_REV	1
33 #endif
34 
35 /* Serial & console */
36 #define CONFIG_SYS_NS16550_SERIAL
37 /* ns16550 reg in the low bits of cpu reg */
38 #define CONFIG_SYS_NS16550_CLK		24000000
39 #ifndef CONFIG_DM_SERIAL
40 # define CONFIG_SYS_NS16550_REG_SIZE	-4
41 # define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
42 # define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
43 # define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
44 # define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
45 # define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
46 #endif
47 
48 /* CPU */
49 #define COUNTER_FREQUENCY		24000000
50 
51 /*
52  * The DRAM Base differs between some models. We cannot use macros for the
53  * CONFIG_FOO defines which contain the DRAM base address since they end
54  * up unexpanded in include/autoconf.mk .
55  *
56  * So we have to have this #ifdef #else #endif block for these.
57  */
58 #ifdef CONFIG_MACH_SUN9I
59 #define SDRAM_OFFSET(x) 0x2##x
60 #define CONFIG_SYS_SDRAM_BASE		0x20000000
61 #define CONFIG_SYS_LOAD_ADDR		0x22000000 /* default load address */
62 #define CONFIG_SYS_TEXT_BASE		0x2a000000
63 /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
64  * since it needs to fit in with the other values. By also #defining it
65  * we get warnings if the Kconfig value mismatches. */
66 #define CONFIG_SPL_STACK_R_ADDR		0x2fe00000
67 #define CONFIG_SPL_BSS_START_ADDR	0x2ff80000
68 #else
69 #define SDRAM_OFFSET(x) 0x4##x
70 #define CONFIG_SYS_SDRAM_BASE		0x40000000
71 #define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
72 /* V3s do not have enough memory to place code at 0x4a000000 */
73 #ifndef CONFIG_MACH_SUN8I_V3S
74 #define CONFIG_SYS_TEXT_BASE		0x4a000000
75 #else
76 #define CONFIG_SYS_TEXT_BASE		0x42e00000
77 #endif
78 /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
79  * since it needs to fit in with the other values. By also #defining it
80  * we get warnings if the Kconfig value mismatches. */
81 #define CONFIG_SPL_STACK_R_ADDR		0x4fe00000
82 #define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
83 #endif
84 
85 #define CONFIG_SPL_BSS_MAX_SIZE		0x00080000 /* 512 KiB */
86 
87 #ifdef CONFIG_SUNXI_HIGH_SRAM
88 /*
89  * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
90  * slightly bigger. Note that it is possible to map the first 32 KiB of the
91  * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
92  * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
93  * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
94  */
95 #define CONFIG_SYS_INIT_RAM_ADDR	0x10000
96 #define CONFIG_SYS_INIT_RAM_SIZE	0x08000	/* FIXME: 40 KiB ? */
97 #else
98 #define CONFIG_SYS_INIT_RAM_ADDR	0x0
99 #define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
100 #endif
101 
102 #define CONFIG_SYS_INIT_SP_OFFSET \
103 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
104 #define CONFIG_SYS_INIT_SP_ADDR \
105 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
106 
107 #define CONFIG_NR_DRAM_BANKS		1
108 #define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
109 #define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */
110 
111 #ifdef CONFIG_AHCI
112 #define CONFIG_LIBATA
113 #define CONFIG_SCSI_AHCI
114 #define CONFIG_SCSI_AHCI_PLAT
115 #define CONFIG_SUNXI_AHCI
116 #define CONFIG_SYS_64BIT_LBA
117 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
118 #define CONFIG_SYS_SCSI_MAX_LUN		1
119 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
120 					 CONFIG_SYS_SCSI_MAX_LUN)
121 #define CONFIG_SCSI
122 #endif
123 
124 #define CONFIG_SETUP_MEMORY_TAGS
125 #define CONFIG_CMDLINE_TAG
126 #define CONFIG_INITRD_TAG
127 #define CONFIG_SERIAL_TAG
128 
129 #ifdef CONFIG_NAND_SUNXI
130 #define CONFIG_SYS_NAND_MAX_ECCPOS 1664
131 #define CONFIG_SYS_NAND_ONFI_DETECTION
132 #define CONFIG_SYS_MAX_NAND_DEVICE 8
133 
134 #define CONFIG_MTD_DEVICE
135 #define CONFIG_MTD_PARTITIONS
136 #endif
137 
138 #ifdef CONFIG_SPL_SPI_SUNXI
139 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000
140 #endif
141 
142 /* mmc config */
143 #ifdef CONFIG_MMC
144 #define CONFIG_MMC_SUNXI_SLOT		0
145 #endif
146 
147 #if defined(CONFIG_ENV_IS_IN_MMC)
148 #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
149 #define CONFIG_SYS_MMC_MAX_DEVICE	4
150 #elif defined(CONFIG_ENV_IS_NOWHERE)
151 #define CONFIG_ENV_SIZE			(128 << 10)
152 #endif
153 
154 #ifndef CONFIG_MACH_SUN8I_V3S
155 /* 64MB of malloc() pool */
156 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (64 << 20))
157 #else
158 /* 2MB of malloc() pool */
159 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (2 << 20))
160 #endif
161 
162 /*
163  * Miscellaneous configurable options
164  */
165 #define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
166 #define CONFIG_SYS_PBSIZE	1024	/* Print Buffer Size */
167 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
168 
169 /* Boot Argument Buffer Size */
170 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
171 
172 /* standalone support */
173 #define CONFIG_STANDALONE_LOAD_ADDR	CONFIG_SYS_LOAD_ADDR
174 
175 /* FLASH and environment organization */
176 
177 #define CONFIG_SYS_MONITOR_LEN		(768 << 10)	/* 768 KiB */
178 
179 #define CONFIG_FAT_WRITE	/* enable write access */
180 
181 #define CONFIG_SPL_FRAMEWORK
182 
183 #ifndef CONFIG_ARM64		/* AArch64 FEL support is not ready yet */
184 #define CONFIG_SPL_BOARD_LOAD_IMAGE
185 #endif
186 
187 #ifdef CONFIG_SUNXI_HIGH_SRAM
188 #define CONFIG_SPL_TEXT_BASE		0x10040		/* sram start+header */
189 #define CONFIG_SPL_MAX_SIZE		0x7fc0		/* 32 KiB */
190 #define LOW_LEVEL_SRAM_STACK		0x00018000
191 #else
192 #define CONFIG_SPL_TEXT_BASE		0x40		/* sram start+header */
193 #define CONFIG_SPL_MAX_SIZE		0x5fc0		/* 24KB on sun4i/sun7i */
194 #define LOW_LEVEL_SRAM_STACK		0x00008000	/* End of sram */
195 #endif
196 
197 #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
198 
199 #ifndef CONFIG_ARM64
200 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
201 #endif
202 
203 #define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */
204 
205 
206 /* I2C */
207 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
208     defined CONFIG_SY8106A_POWER
209 #endif
210 
211 #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
212     defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
213     defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
214 #define CONFIG_SYS_I2C
215 #define CONFIG_SYS_I2C_MVTWSI
216 #define CONFIG_SYS_I2C_SPEED		400000
217 #define CONFIG_SYS_I2C_SLAVE		0x7f
218 #endif
219 
220 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
221 #define CONFIG_SYS_I2C_SOFT
222 #define CONFIG_SYS_I2C_SOFT_SPEED	50000
223 #define CONFIG_SYS_I2C_SOFT_SLAVE	0x00
224 /* We use pin names in Kconfig and sunxi_name_to_gpio() */
225 #define CONFIG_SOFT_I2C_GPIO_SDA	soft_i2c_gpio_sda
226 #define CONFIG_SOFT_I2C_GPIO_SCL	soft_i2c_gpio_scl
227 #ifndef __ASSEMBLY__
228 extern int soft_i2c_gpio_sda;
229 extern int soft_i2c_gpio_scl;
230 #endif
231 #define CONFIG_VIDEO_LCD_I2C_BUS	0 /* The lcd panel soft i2c is bus 0 */
232 #define CONFIG_SYS_SPD_BUS_NUM		1 /* And the axp209 i2c bus is bus 1 */
233 #else
234 #define CONFIG_SYS_SPD_BUS_NUM		0 /* The axp209 i2c bus is bus 0 */
235 #define CONFIG_VIDEO_LCD_I2C_BUS	-1 /* NA, but necessary to compile */
236 #endif
237 
238 /* PMU */
239 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
240     defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
241     defined CONFIG_SY8106A_POWER
242 #endif
243 
244 #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
245 #if CONFIG_CONS_INDEX == 1
246 #ifdef CONFIG_MACH_SUN9I
247 #define OF_STDOUT_PATH		"/soc/serial@07000000:115200"
248 #else
249 #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28000:115200"
250 #endif
251 #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
252 #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
253 #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
254 #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"
255 #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
256 #define OF_STDOUT_PATH		"/soc@01c00000/serial@01f02800:115200"
257 #else
258 #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
259 #endif
260 #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
261 
262 /* GPIO */
263 #define CONFIG_SUNXI_GPIO
264 
265 #ifdef CONFIG_VIDEO
266 /*
267  * The amount of RAM to keep free at the top of RAM when relocating u-boot,
268  * to use as framebuffer. This must be a multiple of 4096.
269  */
270 #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
271 
272 /* Do we want to initialize a simple FB? */
273 #define CONFIG_VIDEO_DT_SIMPLEFB
274 
275 #define CONFIG_VIDEO_SUNXI
276 
277 #define CONFIG_VIDEO_LOGO
278 #define CONFIG_VIDEO_STD_TIMINGS
279 #define CONFIG_I2C_EDID
280 #define VIDEO_LINE_LEN (pGD->plnSizeX)
281 
282 /* allow both serial and cfb console. */
283 /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
284 
285 #endif /* CONFIG_VIDEO */
286 
287 /* Ethernet support */
288 #ifdef CONFIG_SUNXI_EMAC
289 #define CONFIG_PHY_ADDR		1
290 #define CONFIG_MII			/* MII PHY management		*/
291 #define CONFIG_PHYLIB
292 #endif
293 
294 #ifdef CONFIG_SUNXI_GMAC
295 #define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
296 #define CONFIG_PHY_ADDR		1
297 #define CONFIG_MII			/* MII PHY management		*/
298 #define CONFIG_PHY_REALTEK
299 #endif
300 
301 #ifdef CONFIG_USB_EHCI_HCD
302 #define CONFIG_USB_OHCI_NEW
303 #define CONFIG_USB_OHCI_SUNXI
304 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
305 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
306 #endif
307 
308 #ifdef CONFIG_USB_MUSB_SUNXI
309 #define CONFIG_USB_MUSB_PIO_ONLY
310 #endif
311 
312 #ifdef CONFIG_USB_MUSB_GADGET
313 #define CONFIG_USB_FUNCTION_FASTBOOT
314 #define CONFIG_USB_FUNCTION_MASS_STORAGE
315 #endif
316 
317 #ifdef CONFIG_USB_FUNCTION_FASTBOOT
318 #define CONFIG_CMD_FASTBOOT
319 #define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
320 #define CONFIG_FASTBOOT_BUF_SIZE	0x2000000
321 #define CONFIG_ANDROID_BOOT_IMAGE
322 
323 #define CONFIG_FASTBOOT_FLASH
324 
325 #ifdef CONFIG_MMC
326 #define CONFIG_FASTBOOT_FLASH_MMC_DEV	0
327 #endif
328 #endif
329 
330 #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
331 #endif
332 
333 #ifdef CONFIG_USB_KEYBOARD
334 #define CONFIG_PREBOOT
335 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
336 #endif
337 
338 #define CONFIG_MISC_INIT_R
339 
340 #ifndef CONFIG_SPL_BUILD
341 #include <config_distro_defaults.h>
342 
343 #ifdef CONFIG_ARM64
344 /*
345  * Boards seem to come with at least 512MB of DRAM.
346  * The kernel should go at 512K, which is the default text offset (that will
347  * be adjusted at runtime if needed).
348  * There is no compression for arm64 kernels (yet), so leave some space
349  * for really big kernels, say 256MB for now.
350  * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
351  * Align the initrd to a 2MB page.
352  */
353 #define BOOTM_SIZE	__stringify(0xa000000)
354 #define KERNEL_ADDR_R	__stringify(SDRAM_OFFSET(0080000))
355 #define FDT_ADDR_R	__stringify(SDRAM_OFFSET(FA00000))
356 #define SCRIPT_ADDR_R	__stringify(SDRAM_OFFSET(FC00000))
357 #define PXEFILE_ADDR_R	__stringify(SDRAM_OFFSET(FD00000))
358 #define RAMDISK_ADDR_R	__stringify(SDRAM_OFFSET(FE00000))
359 
360 #else
361 /*
362  * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
363  * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
364  * 1M script, 1M pxe and the ramdisk at the end.
365  */
366 #ifndef CONFIG_MACH_SUN8I_V3S
367 #define BOOTM_SIZE     __stringify(0xa000000)
368 #define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(2000000))
369 #define FDT_ADDR_R     __stringify(SDRAM_OFFSET(3000000))
370 #define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(3100000))
371 #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
372 #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
373 #else
374 /*
375  * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
376  * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
377  * 1M script, 1M pxe and the ramdisk at the end.
378  */
379 #define BOOTM_SIZE     __stringify(0x2e00000)
380 #define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(1000000))
381 #define FDT_ADDR_R     __stringify(SDRAM_OFFSET(1800000))
382 #define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(1900000))
383 #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
384 #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
385 #endif
386 #endif
387 
388 #define MEM_LAYOUT_ENV_SETTINGS \
389 	"bootm_size=" BOOTM_SIZE "\0" \
390 	"kernel_addr_r=" KERNEL_ADDR_R "\0" \
391 	"fdt_addr_r=" FDT_ADDR_R "\0" \
392 	"scriptaddr=" SCRIPT_ADDR_R "\0" \
393 	"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
394 	"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
395 
396 #define DFU_ALT_INFO_RAM \
397 	"dfu_alt_info_ram=" \
398 	"kernel ram " KERNEL_ADDR_R " 0x1000000;" \
399 	"fdt ram " FDT_ADDR_R " 0x100000;" \
400 	"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
401 
402 #ifdef CONFIG_MMC
403 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
404 #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
405 #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
406 #else
407 #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
408 #endif
409 #else
410 #define BOOT_TARGET_DEVICES_MMC(func)
411 #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
412 #endif
413 
414 #ifdef CONFIG_AHCI
415 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
416 #else
417 #define BOOT_TARGET_DEVICES_SCSI(func)
418 #endif
419 
420 #ifdef CONFIG_USB_STORAGE
421 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
422 #else
423 #define BOOT_TARGET_DEVICES_USB(func)
424 #endif
425 
426 /* FEL boot support, auto-execute boot.scr if a script address was provided */
427 #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
428 	"bootcmd_fel=" \
429 		"if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
430 			"echo '(FEL boot)'; " \
431 			"source ${fel_scriptaddr}; " \
432 		"fi\0"
433 #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
434 	"fel "
435 
436 #define BOOT_TARGET_DEVICES(func) \
437 	func(FEL, fel, na) \
438 	BOOT_TARGET_DEVICES_MMC(func) \
439 	BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
440 	BOOT_TARGET_DEVICES_SCSI(func) \
441 	BOOT_TARGET_DEVICES_USB(func) \
442 	func(PXE, pxe, na) \
443 	func(DHCP, dhcp, na)
444 
445 #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
446 #define BOOTCMD_SUNXI_COMPAT \
447 	"bootcmd_sunxi_compat=" \
448 		"setenv root /dev/mmcblk0p3 rootwait; " \
449 		"if ext2load mmc 0 0x44000000 uEnv.txt; then " \
450 			"echo Loaded environment from uEnv.txt; " \
451 			"env import -t 0x44000000 ${filesize}; " \
452 		"fi; " \
453 		"setenv bootargs console=${console} root=${root} ${extraargs}; " \
454 		"ext2load mmc 0 0x43000000 script.bin && " \
455 		"ext2load mmc 0 0x48000000 uImage && " \
456 		"bootm 0x48000000\0"
457 #else
458 #define BOOTCMD_SUNXI_COMPAT
459 #endif
460 
461 #include <config_distro_bootcmd.h>
462 
463 #ifdef CONFIG_USB_KEYBOARD
464 #define CONSOLE_STDIN_SETTINGS \
465 	"preboot=usb start\0" \
466 	"stdin=serial,usbkbd\0"
467 #else
468 #define CONSOLE_STDIN_SETTINGS \
469 	"stdin=serial\0"
470 #endif
471 
472 #ifdef CONFIG_VIDEO
473 #define CONSOLE_STDOUT_SETTINGS \
474 	"stdout=serial,vga\0" \
475 	"stderr=serial,vga\0"
476 #else
477 #define CONSOLE_STDOUT_SETTINGS \
478 	"stdout=serial\0" \
479 	"stderr=serial\0"
480 #endif
481 
482 #ifdef CONFIG_MTDIDS_DEFAULT
483 #define SUNXI_MTDIDS_DEFAULT \
484 	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
485 #else
486 #define SUNXI_MTDIDS_DEFAULT
487 #endif
488 
489 #ifdef CONFIG_MTDPARTS_DEFAULT
490 #define SUNXI_MTDPARTS_DEFAULT \
491 	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
492 #else
493 #define SUNXI_MTDPARTS_DEFAULT
494 #endif
495 
496 #define CONSOLE_ENV_SETTINGS \
497 	CONSOLE_STDIN_SETTINGS \
498 	CONSOLE_STDOUT_SETTINGS
499 
500 #ifdef CONFIG_ARM64
501 #define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
502 #else
503 #define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
504 #endif
505 
506 #define CONFIG_EXTRA_ENV_SETTINGS \
507 	CONSOLE_ENV_SETTINGS \
508 	MEM_LAYOUT_ENV_SETTINGS \
509 	DFU_ALT_INFO_RAM \
510 	"fdtfile=" FDTFILE "\0" \
511 	"console=ttyS0,115200\0" \
512 	SUNXI_MTDIDS_DEFAULT \
513 	SUNXI_MTDPARTS_DEFAULT \
514 	BOOTCMD_SUNXI_COMPAT \
515 	BOOTENV
516 
517 #else /* ifndef CONFIG_SPL_BUILD */
518 #define CONFIG_EXTRA_ENV_SETTINGS
519 #endif
520 
521 #endif /* _SUNXI_COMMON_CONFIG_H */
522