1 /*
2  * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3  *
4  * (C) Copyright 2007-2011
5  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6  * Tom Cubie <tangliang@allwinnertech.com>
7  *
8  * Configuration settings for the Allwinner sunxi series of boards.
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef _SUNXI_COMMON_CONFIG_H
14 #define _SUNXI_COMMON_CONFIG_H
15 
16 /*
17  * High Level Configuration Options
18  */
19 #define CONFIG_SUNXI		/* sunxi family */
20 #ifdef CONFIG_SPL_BUILD
21 #ifndef CONFIG_SPL_FEL
22 #define CONFIG_SYS_THUMB_BUILD	/* Thumbs mode to save space in SPL */
23 #endif
24 #endif
25 
26 #include <asm/arch/cpu.h>	/* get chip and board defs */
27 
28 #define CONFIG_SYS_TEXT_BASE		0x4a000000
29 
30 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM)
31 # define CONFIG_CMD_DM
32 # define CONFIG_DM_GPIO
33 # define CONFIG_DM_SERIAL
34 # define CONFIG_DW_SERIAL
35 # define CONFIG_SYS_MALLOC_F_LEN	(1 << 10)
36 #endif
37 
38 /*
39  * Display CPU information
40  */
41 #define CONFIG_DISPLAY_CPUINFO
42 
43 #define CONFIG_SYS_PROMPT	"sunxi# "
44 
45 /* Serial & console */
46 #define CONFIG_SYS_NS16550
47 #define CONFIG_SYS_NS16550_SERIAL
48 /* ns16550 reg in the low bits of cpu reg */
49 #define CONFIG_SYS_NS16550_CLK		24000000
50 #ifndef CONFIG_DM_SERIAL
51 # define CONFIG_SYS_NS16550_REG_SIZE	-4
52 # define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
53 # define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
54 # define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
55 # define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
56 # define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
57 #endif
58 
59 /* DRAM Base */
60 #define CONFIG_SYS_SDRAM_BASE		0x40000000
61 #define CONFIG_SYS_INIT_RAM_ADDR	0x0
62 #define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
63 
64 #define CONFIG_SYS_INIT_SP_OFFSET \
65 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
66 #define CONFIG_SYS_INIT_SP_ADDR \
67 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
68 
69 #define CONFIG_NR_DRAM_BANKS		1
70 #define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
71 #define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */
72 
73 #ifdef CONFIG_AHCI
74 #define CONFIG_LIBATA
75 #define CONFIG_SCSI_AHCI
76 #define CONFIG_SCSI_AHCI_PLAT
77 #define CONFIG_SUNXI_AHCI
78 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
79 #define CONFIG_SYS_SCSI_MAX_LUN		1
80 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
81 					 CONFIG_SYS_SCSI_MAX_LUN)
82 #define CONFIG_CMD_SCSI
83 #endif
84 
85 #define CONFIG_CMD_MEMORY
86 #define CONFIG_CMD_SETEXPR
87 
88 #define CONFIG_SETUP_MEMORY_TAGS
89 #define CONFIG_CMDLINE_TAG
90 #define CONFIG_INITRD_TAG
91 
92 /* mmc config */
93 #if !defined(CONFIG_UART0_PORT_F)
94 #define CONFIG_MMC
95 #define CONFIG_GENERIC_MMC
96 #define CONFIG_CMD_MMC
97 #define CONFIG_MMC_SUNXI
98 #define CONFIG_MMC_SUNXI_SLOT		0
99 #define CONFIG_ENV_IS_IN_MMC
100 #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
101 #endif
102 
103 /* 4MB of malloc() pool */
104 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (4 << 20))
105 
106 /*
107  * Miscellaneous configurable options
108  */
109 #define CONFIG_CMD_ECHO
110 #define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
111 #define CONFIG_SYS_PBSIZE	1024	/* Print Buffer Size */
112 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
113 #define CONFIG_SYS_GENERIC_BOARD
114 
115 /* Boot Argument Buffer Size */
116 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
117 
118 #define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
119 
120 /* standalone support */
121 #define CONFIG_STANDALONE_LOAD_ADDR	0x42000000
122 
123 /* baudrate */
124 #define CONFIG_BAUDRATE			115200
125 
126 /* The stack sizes are set up in start.S using the settings below */
127 #define CONFIG_STACKSIZE		(256 << 10)	/* 256 KiB */
128 
129 /* FLASH and environment organization */
130 
131 #define CONFIG_SYS_NO_FLASH
132 
133 #define CONFIG_SYS_MONITOR_LEN		(512 << 10)	/* 512 KiB */
134 #define CONFIG_IDENT_STRING		" Allwinner Technology"
135 
136 #define CONFIG_ENV_OFFSET		(544 << 10) /* (8 + 24 + 512) KiB */
137 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
138 
139 #include <config_cmd_default.h>
140 #undef CONFIG_CMD_FPGA
141 
142 #define CONFIG_FAT_WRITE	/* enable write access */
143 
144 #define CONFIG_SPL_FRAMEWORK
145 #define CONFIG_SPL_LIBCOMMON_SUPPORT
146 #define CONFIG_SPL_SERIAL_SUPPORT
147 #define CONFIG_SPL_LIBGENERIC_SUPPORT
148 
149 #ifdef CONFIG_SPL_FEL
150 
151 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
152 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
153 #define CONFIG_SPL_TEXT_BASE		0x2000
154 #define CONFIG_SPL_MAX_SIZE		0x4000		/* 16 KiB */
155 
156 #else /* CONFIG_SPL */
157 
158 #define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
159 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KiB */
160 
161 #define CONFIG_SPL_TEXT_BASE		0x20		/* sram start+header */
162 #define CONFIG_SPL_MAX_SIZE		0x5fe0		/* 24KB on sun4i/sun7i */
163 
164 #define CONFIG_SPL_LIBDISK_SUPPORT
165 
166 #if !defined(CONFIG_UART0_PORT_F)
167 #define CONFIG_SPL_MMC_SUPPORT
168 #endif
169 
170 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
171 
172 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	80	/* 40KiB */
173 #define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */
174 
175 #endif /* CONFIG_SPL */
176 
177 /* end of 32 KiB in sram */
178 #define LOW_LEVEL_SRAM_STACK		0x00008000 /* End of sram */
179 #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
180 #define CONFIG_SYS_SPL_MALLOC_START	0x4ff00000
181 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00080000	/* 512 KiB */
182 
183 /* I2C */
184 #define CONFIG_SPL_I2C_SUPPORT
185 #define CONFIG_SYS_I2C
186 #define CONFIG_SYS_I2C_MVTWSI
187 #define CONFIG_SYS_I2C_SPEED		400000
188 #define CONFIG_SYS_I2C_SLAVE		0x7f
189 #define CONFIG_CMD_I2C
190 
191 /* PMU */
192 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
193 #define CONFIG_SPL_POWER_SUPPORT
194 #endif
195 
196 #ifndef CONFIG_CONS_INDEX
197 #define CONFIG_CONS_INDEX              1       /* UART0 */
198 #endif
199 
200 /* GPIO */
201 #define CONFIG_SUNXI_GPIO
202 #define CONFIG_SPL_GPIO_SUPPORT
203 #define CONFIG_CMD_GPIO
204 
205 #ifdef CONFIG_VIDEO
206 /*
207  * The amount of RAM that is reserved for the FB. This will not show up as
208  * RAM to the kernel, but will be reclaimed by a KMS driver in future.
209  */
210 #define CONFIG_SUNXI_FB_SIZE (9 << 20)
211 
212 /* Do we want to initialize a simple FB? */
213 #define CONFIG_VIDEO_DT_SIMPLEFB
214 
215 #define CONFIG_VIDEO_SUNXI
216 
217 #define CONFIG_CFB_CONSOLE
218 #define CONFIG_VIDEO_SW_CURSOR
219 #define CONFIG_VIDEO_LOGO
220 #define CONFIG_VIDEO_STD_TIMINGS
221 #define CONFIG_I2C_EDID
222 
223 /* allow both serial and cfb console. */
224 #define CONFIG_CONSOLE_MUX
225 /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
226 #define CONFIG_VGA_AS_SINGLE_DEVICE
227 
228 #define CONFIG_SYS_MEM_TOP_HIDE ((CONFIG_SUNXI_FB_SIZE + 0xFFF) & ~0xFFF)
229 
230 /* To be able to hook simplefb into dt */
231 #ifdef CONFIG_VIDEO_DT_SIMPLEFB
232 #define CONFIG_OF_BOARD_SETUP
233 #endif
234 
235 #endif /* CONFIG_VIDEO */
236 
237 /* Ethernet support */
238 #ifdef CONFIG_SUNXI_EMAC
239 #define CONFIG_MII			/* MII PHY management		*/
240 #endif
241 
242 #ifdef CONFIG_SUNXI_GMAC
243 #define CONFIG_DESIGNWARE_ETH		/* GMAC can use designware driver */
244 #define CONFIG_DW_AUTONEG
245 #define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
246 #define CONFIG_PHY_ADDR		1
247 #define CONFIG_MII			/* MII PHY management		*/
248 #define CONFIG_PHYLIB
249 #endif
250 
251 #ifdef CONFIG_USB_EHCI
252 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
253 #endif
254 
255 #ifdef CONFIG_USB_MUSB_SUNXI
256 #define CONFIG_MUSB_HOST
257 #define CONFIG_MUSB_PIO_ONLY
258 #endif
259 
260 #if defined CONFIG_USB_EHCI || defined CONFIG_USB_MUSB_SUNXI
261 #define CONFIG_CMD_USB
262 #define CONFIG_USB_STORAGE
263 #endif
264 
265 #ifdef CONFIG_USB_KEYBOARD
266 #define CONFIG_CONSOLE_MUX
267 #define CONFIG_PREBOOT
268 #define CONFIG_SYS_STDIO_DEREGISTER
269 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
270 #endif
271 
272 #if !defined CONFIG_ENV_IS_IN_MMC && \
273     !defined CONFIG_ENV_IS_IN_NAND && \
274     !defined CONFIG_ENV_IS_IN_FAT && \
275     !defined CONFIG_ENV_IS_IN_SPI_FLASH
276 #define CONFIG_ENV_IS_NOWHERE
277 #endif
278 
279 #define CONFIG_MISC_INIT_R
280 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
281 
282 #ifndef CONFIG_SPL_BUILD
283 #include <config_distro_defaults.h>
284 
285 /* Enable pre-console buffer to get complete log on the VGA console */
286 #define CONFIG_PRE_CONSOLE_BUFFER
287 #define CONFIG_PRE_CON_BUF_SZ		(1024 * 1024)
288 /* Use the room between the end of bootm_size and the framebuffer */
289 #define CONFIG_PRE_CON_BUF_ADDR		0x4f000000
290 
291 /*
292  * 240M RAM (256M minimum minus space for the framebuffer),
293  * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
294  * 1M script, 1M pxe and the ramdisk at the end.
295  */
296 #define MEM_LAYOUT_ENV_SETTINGS \
297 	"bootm_size=0xf000000\0" \
298 	"kernel_addr_r=0x42000000\0" \
299 	"fdt_addr_r=0x43000000\0" \
300 	"scriptaddr=0x43100000\0" \
301 	"pxefile_addr_r=0x43200000\0" \
302 	"ramdisk_addr_r=0x43300000\0"
303 
304 #ifdef CONFIG_MMC
305 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
306 #else
307 #define BOOT_TARGET_DEVICES_MMC(func)
308 #endif
309 
310 #ifdef CONFIG_AHCI
311 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
312 #else
313 #define BOOT_TARGET_DEVICES_SCSI(func)
314 #endif
315 
316 #ifdef CONFIG_USB_EHCI
317 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
318 #else
319 #define BOOT_TARGET_DEVICES_USB(func)
320 #endif
321 
322 #define BOOT_TARGET_DEVICES(func) \
323 	BOOT_TARGET_DEVICES_MMC(func) \
324 	BOOT_TARGET_DEVICES_SCSI(func) \
325 	BOOT_TARGET_DEVICES_USB(func) \
326 	func(PXE, pxe, na) \
327 	func(DHCP, dhcp, na)
328 
329 #include <config_distro_bootcmd.h>
330 
331 #ifdef CONFIG_USB_KEYBOARD
332 #define CONSOLE_STDIN_SETTINGS \
333 	"preboot=usb start\0" \
334 	"stdin=serial,usbkbd\0"
335 #else
336 #define CONSOLE_STDIN_SETTINGS \
337 	"stdin=serial\0"
338 #endif
339 
340 #ifdef CONFIG_VIDEO
341 #define CONSOLE_STDOUT_SETTINGS \
342 	"stdout=serial,vga\0" \
343 	"stderr=serial,vga\0"
344 #else
345 #define CONSOLE_STDOUT_SETTINGS \
346 	"stdout=serial\0" \
347 	"stderr=serial\0"
348 #endif
349 
350 #define CONSOLE_ENV_SETTINGS \
351 	CONSOLE_STDIN_SETTINGS \
352 	CONSOLE_STDOUT_SETTINGS
353 
354 #define CONFIG_EXTRA_ENV_SETTINGS \
355 	CONSOLE_ENV_SETTINGS \
356 	MEM_LAYOUT_ENV_SETTINGS \
357 	"fdtfile=" CONFIG_FDTFILE "\0" \
358 	"console=ttyS0,115200\0" \
359 	BOOTENV
360 
361 #else /* ifndef CONFIG_SPL_BUILD */
362 #define CONFIG_EXTRA_ENV_SETTINGS
363 #endif
364 
365 #endif /* _SUNXI_COMMON_CONFIG_H */
366