1 /* 2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3 * 4 * (C) Copyright 2007-2011 5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6 * Tom Cubie <tangliang@allwinnertech.com> 7 * 8 * Configuration settings for the Allwinner sunxi series of boards. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef _SUNXI_COMMON_CONFIG_H 14 #define _SUNXI_COMMON_CONFIG_H 15 16 #include <linux/stringify.h> 17 18 #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 19 /* 20 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the 21 * expense of restricting some features, so the regular machine id values can 22 * be used. 23 */ 24 # define CONFIG_MACH_TYPE_COMPAT_REV 0 25 #else 26 /* 27 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. 28 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass 29 * beyond the machine id check. 30 */ 31 # define CONFIG_MACH_TYPE_COMPAT_REV 1 32 #endif 33 34 /* 35 * High Level Configuration Options 36 */ 37 #define CONFIG_SUNXI /* sunxi family */ 38 #ifdef CONFIG_SPL_BUILD 39 #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 40 #endif 41 42 #include <asm/arch/cpu.h> /* get chip and board defs */ 43 44 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL) 45 # define CONFIG_DW_SERIAL 46 #endif 47 48 /* 49 * Display CPU information 50 */ 51 #define CONFIG_DISPLAY_CPUINFO 52 53 /* Serial & console */ 54 #define CONFIG_SYS_NS16550 55 #define CONFIG_SYS_NS16550_SERIAL 56 /* ns16550 reg in the low bits of cpu reg */ 57 #define CONFIG_SYS_NS16550_CLK 24000000 58 #ifndef CONFIG_DM_SERIAL 59 # define CONFIG_SYS_NS16550_REG_SIZE -4 60 # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 61 # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 62 # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 63 # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 64 # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE 65 #endif 66 67 /* CPU */ 68 #define CONFIG_SYS_CACHELINE_SIZE 64 69 70 /* 71 * The DRAM Base differs between some models. We cannot use macros for the 72 * CONFIG_FOO defines which contain the DRAM base address since they end 73 * up unexpanded in include/autoconf.mk . 74 * 75 * So we have to have this #ifdef #else #endif block for these. 76 */ 77 #ifdef CONFIG_MACH_SUN9I 78 #define SDRAM_OFFSET(x) 0x2##x 79 #define CONFIG_SYS_SDRAM_BASE 0x20000000 80 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ 81 #define CONFIG_SYS_TEXT_BASE 0x2a000000 82 #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000 83 #define CONFIG_SYS_SPL_MALLOC_START 0x2ff00000 84 #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 85 #else 86 #define SDRAM_OFFSET(x) 0x4##x 87 #define CONFIG_SYS_SDRAM_BASE 0x40000000 88 #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 89 #define CONFIG_SYS_TEXT_BASE 0x4a000000 90 #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 91 #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 92 #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 93 #endif 94 95 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ 96 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ 97 98 #ifdef CONFIG_MACH_SUN9I 99 /* 100 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is 101 * slightly bigger. Note that it is possible to map the first 32 KiB of the 102 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the 103 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and 104 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. 105 */ 106 #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 107 #define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */ 108 #else 109 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 110 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 111 #endif 112 113 #define CONFIG_SYS_INIT_SP_OFFSET \ 114 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 115 #define CONFIG_SYS_INIT_SP_ADDR \ 116 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 117 118 #define CONFIG_NR_DRAM_BANKS 1 119 #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 120 #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 121 122 #ifdef CONFIG_AHCI 123 #define CONFIG_LIBATA 124 #define CONFIG_SCSI_AHCI 125 #define CONFIG_SCSI_AHCI_PLAT 126 #define CONFIG_SUNXI_AHCI 127 #define CONFIG_SYS_64BIT_LBA 128 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 129 #define CONFIG_SYS_SCSI_MAX_LUN 1 130 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 131 CONFIG_SYS_SCSI_MAX_LUN) 132 #define CONFIG_CMD_SCSI 133 #endif 134 135 #define CONFIG_SETUP_MEMORY_TAGS 136 #define CONFIG_CMDLINE_TAG 137 #define CONFIG_INITRD_TAG 138 #define CONFIG_SERIAL_TAG 139 140 #ifdef CONFIG_NAND_SUNXI 141 #define CONFIG_SPL_NAND_SUPPORT 1 142 #endif 143 144 /* mmc config */ 145 #if !defined(CONFIG_UART0_PORT_F) 146 #define CONFIG_MMC 147 #define CONFIG_GENERIC_MMC 148 #define CONFIG_CMD_MMC 149 #define CONFIG_MMC_SUNXI 150 #define CONFIG_MMC_SUNXI_SLOT 0 151 #define CONFIG_ENV_IS_IN_MMC 152 #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 153 #endif 154 155 /* 4MB of malloc() pool */ 156 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 157 158 /* 159 * Miscellaneous configurable options 160 */ 161 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 162 #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ 163 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 164 #define CONFIG_SYS_GENERIC_BOARD 165 166 /* Boot Argument Buffer Size */ 167 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 168 169 /* standalone support */ 170 #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR 171 172 /* baudrate */ 173 #define CONFIG_BAUDRATE 115200 174 175 /* The stack sizes are set up in start.S using the settings below */ 176 #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 177 178 /* FLASH and environment organization */ 179 180 #define CONFIG_SYS_NO_FLASH 181 182 #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ 183 #define CONFIG_IDENT_STRING " Allwinner Technology" 184 185 #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 186 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 187 188 #define CONFIG_FAT_WRITE /* enable write access */ 189 190 #define CONFIG_SPL_FRAMEWORK 191 #define CONFIG_SPL_LIBCOMMON_SUPPORT 192 #define CONFIG_SPL_SERIAL_SUPPORT 193 #define CONFIG_SPL_LIBGENERIC_SUPPORT 194 195 #define CONFIG_SPL_BOARD_LOAD_IMAGE 196 197 #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 198 #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 199 200 #define CONFIG_SPL_LIBDISK_SUPPORT 201 202 #if !defined(CONFIG_UART0_PORT_F) 203 #define CONFIG_SPL_MMC_SUPPORT 204 #endif 205 206 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 207 208 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 209 #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 210 211 /* end of 32 KiB in sram */ 212 #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 213 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 214 215 /* I2C */ 216 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER 217 #define CONFIG_SPL_I2C_SUPPORT 218 #endif 219 220 #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ 221 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ 222 defined CONFIG_I2C4_ENABLE 223 #define CONFIG_SYS_I2C 224 #define CONFIG_SYS_I2C_MVTWSI 225 #define CONFIG_SYS_I2C_SPEED 400000 226 #define CONFIG_SYS_I2C_SLAVE 0x7f 227 #define CONFIG_CMD_I2C 228 #endif 229 230 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) 231 #define CONFIG_SYS_I2C_SOFT 232 #define CONFIG_SYS_I2C_SOFT_SPEED 50000 233 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 234 /* We use pin names in Kconfig and sunxi_name_to_gpio() */ 235 #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda 236 #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl 237 #ifndef __ASSEMBLY__ 238 extern int soft_i2c_gpio_sda; 239 extern int soft_i2c_gpio_scl; 240 #endif 241 #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ 242 #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ 243 #else 244 #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ 245 #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ 246 #endif 247 248 /* PMU */ 249 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER 250 #define CONFIG_SPL_POWER_SUPPORT 251 #endif 252 253 #ifndef CONFIG_CONS_INDEX 254 #define CONFIG_CONS_INDEX 1 /* UART0 */ 255 #endif 256 257 #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE 258 #if CONFIG_CONS_INDEX == 1 259 #ifdef CONFIG_MACH_SUN9I 260 #define OF_STDOUT_PATH "/soc/serial@07000000:115200" 261 #else 262 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" 263 #endif 264 #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) 265 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" 266 #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) 267 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" 268 #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) 269 #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" 270 #else 271 #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. 272 #endif 273 #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */ 274 275 /* GPIO */ 276 #define CONFIG_SUNXI_GPIO 277 #define CONFIG_SPL_GPIO_SUPPORT 278 #define CONFIG_CMD_GPIO 279 280 #ifdef CONFIG_VIDEO 281 /* 282 * The amount of RAM to keep free at the top of RAM when relocating u-boot, 283 * to use as framebuffer. This must be a multiple of 4096. 284 */ 285 #ifdef CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804 286 #define CONFIG_SUNXI_MAX_FB_SIZE (12 << 20) 287 #else 288 #define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20) 289 #endif 290 291 /* Do we want to initialize a simple FB? */ 292 #define CONFIG_VIDEO_DT_SIMPLEFB 293 294 #define CONFIG_VIDEO_SUNXI 295 296 #define CONFIG_CFB_CONSOLE 297 #define CONFIG_VIDEO_SW_CURSOR 298 #define CONFIG_VIDEO_LOGO 299 #define CONFIG_VIDEO_STD_TIMINGS 300 #define CONFIG_I2C_EDID 301 #define VIDEO_LINE_LEN (pGD->plnSizeX) 302 303 /* allow both serial and cfb console. */ 304 #define CONFIG_CONSOLE_MUX 305 /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ 306 #define CONFIG_VGA_AS_SINGLE_DEVICE 307 308 /* To be able to hook simplefb into dt */ 309 #ifdef CONFIG_VIDEO_DT_SIMPLEFB 310 #define CONFIG_OF_BOARD_SETUP 311 #endif 312 313 #endif /* CONFIG_VIDEO */ 314 315 /* Ethernet support */ 316 #ifdef CONFIG_SUNXI_EMAC 317 #define CONFIG_PHY_ADDR 1 318 #define CONFIG_MII /* MII PHY management */ 319 #define CONFIG_PHYLIB 320 #endif 321 322 #ifdef CONFIG_SUNXI_GMAC 323 #define CONFIG_DW_AUTONEG 324 #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 325 #define CONFIG_PHY_ADDR 1 326 #define CONFIG_MII /* MII PHY management */ 327 #define CONFIG_PHYLIB 328 #endif 329 330 #ifdef CONFIG_USB_EHCI_HCD 331 #define CONFIG_USB_OHCI_NEW 332 #define CONFIG_USB_OHCI_SUNXI 333 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 334 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 335 #endif 336 337 #ifdef CONFIG_USB_MUSB_SUNXI 338 #define CONFIG_USB_MUSB_PIO_ONLY 339 #endif 340 341 #ifdef CONFIG_USB_MUSB_GADGET 342 #define CONFIG_USB_GADGET 343 #define CONFIG_USB_GADGET_DUALSPEED 344 #define CONFIG_USB_GADGET_VBUS_DRAW 0 345 346 #define CONFIG_USB_GADGET_DOWNLOAD 347 #define CONFIG_USB_FUNCTION_FASTBOOT 348 #define CONFIG_USB_FUNCTION_MASS_STORAGE 349 #endif 350 351 #ifdef CONFIG_USB_GADGET_DOWNLOAD 352 #define CONFIG_G_DNL_VENDOR_NUM 0x1f3a 353 #define CONFIG_G_DNL_PRODUCT_NUM 0x1010 354 #define CONFIG_G_DNL_MANUFACTURER "Allwinner Technology" 355 #endif 356 357 #ifdef CONFIG_USB_FUNCTION_FASTBOOT 358 #define CONFIG_CMD_FASTBOOT 359 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 360 #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000 361 362 #define CONFIG_FASTBOOT_FLASH 363 #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 364 #define CONFIG_EFI_PARTITION 365 #endif 366 367 #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE 368 #define CONFIG_CMD_USB_MASS_STORAGE 369 #endif 370 371 #ifdef CONFIG_USB_KEYBOARD 372 #define CONFIG_CONSOLE_MUX 373 #define CONFIG_PREBOOT 374 #define CONFIG_SYS_STDIO_DEREGISTER 375 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 376 #endif 377 378 #if !defined CONFIG_ENV_IS_IN_MMC && \ 379 !defined CONFIG_ENV_IS_IN_NAND && \ 380 !defined CONFIG_ENV_IS_IN_FAT && \ 381 !defined CONFIG_ENV_IS_IN_SPI_FLASH 382 #define CONFIG_ENV_IS_NOWHERE 383 #endif 384 385 #define CONFIG_MISC_INIT_R 386 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 387 388 #ifndef CONFIG_SPL_BUILD 389 #include <config_distro_defaults.h> 390 391 /* Enable pre-console buffer to get complete log on the VGA console */ 392 #define CONFIG_PRE_CONSOLE_BUFFER 393 #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */ 394 395 /* 396 * 240M RAM (256M minimum minus space for the framebuffer), 397 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 398 * 1M script, 1M pxe and the ramdisk at the end. 399 */ 400 #define MEM_LAYOUT_ENV_SETTINGS \ 401 "bootm_size=0xf000000\0" \ 402 "kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \ 403 "fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \ 404 "scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \ 405 "pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \ 406 "ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0" 407 408 #ifdef CONFIG_MMC 409 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 410 #else 411 #define BOOT_TARGET_DEVICES_MMC(func) 412 #endif 413 414 #ifdef CONFIG_AHCI 415 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 416 #else 417 #define BOOT_TARGET_DEVICES_SCSI(func) 418 #endif 419 420 #ifdef CONFIG_USB_STORAGE 421 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 422 #else 423 #define BOOT_TARGET_DEVICES_USB(func) 424 #endif 425 426 #define BOOT_TARGET_DEVICES(func) \ 427 BOOT_TARGET_DEVICES_MMC(func) \ 428 BOOT_TARGET_DEVICES_SCSI(func) \ 429 BOOT_TARGET_DEVICES_USB(func) \ 430 func(PXE, pxe, na) \ 431 func(DHCP, dhcp, na) 432 433 #include <config_distro_bootcmd.h> 434 435 #ifdef CONFIG_USB_KEYBOARD 436 #define CONSOLE_STDIN_SETTINGS \ 437 "preboot=usb start\0" \ 438 "stdin=serial,usbkbd\0" 439 #else 440 #define CONSOLE_STDIN_SETTINGS \ 441 "stdin=serial\0" 442 #endif 443 444 #ifdef CONFIG_VIDEO 445 #define CONSOLE_STDOUT_SETTINGS \ 446 "stdout=serial,vga\0" \ 447 "stderr=serial,vga\0" 448 #else 449 #define CONSOLE_STDOUT_SETTINGS \ 450 "stdout=serial\0" \ 451 "stderr=serial\0" 452 #endif 453 454 #define CONSOLE_ENV_SETTINGS \ 455 CONSOLE_STDIN_SETTINGS \ 456 CONSOLE_STDOUT_SETTINGS 457 458 #define CONFIG_EXTRA_ENV_SETTINGS \ 459 CONSOLE_ENV_SETTINGS \ 460 MEM_LAYOUT_ENV_SETTINGS \ 461 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ 462 "console=ttyS0,115200\0" \ 463 BOOTENV 464 465 #else /* ifndef CONFIG_SPL_BUILD */ 466 #define CONFIG_EXTRA_ENV_SETTINGS 467 #endif 468 469 #endif /* _SUNXI_COMMON_CONFIG_H */ 470