1 /* 2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3 * 4 * (C) Copyright 2007-2011 5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6 * Tom Cubie <tangliang@allwinnertech.com> 7 * 8 * Configuration settings for the Allwinner sunxi series of boards. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef _SUNXI_COMMON_CONFIG_H 14 #define _SUNXI_COMMON_CONFIG_H 15 16 /* 17 * High Level Configuration Options 18 */ 19 #define CONFIG_SUNXI /* sunxi family */ 20 #ifdef CONFIG_SPL_BUILD 21 #ifndef CONFIG_SPL_FEL 22 #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 23 #endif 24 #endif 25 26 #include <asm/arch/cpu.h> /* get chip and board defs */ 27 28 #define CONFIG_SYS_TEXT_BASE 0x4a000000 29 30 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM) 31 # define CONFIG_CMD_DM 32 # define CONFIG_DM_GPIO 33 # define CONFIG_DM_SERIAL 34 # define CONFIG_DW_SERIAL 35 # define CONFIG_SYS_MALLOC_F_LEN (1 << 10) 36 #endif 37 38 /* 39 * Display CPU information 40 */ 41 #define CONFIG_DISPLAY_CPUINFO 42 43 /* Serial & console */ 44 #define CONFIG_SYS_NS16550 45 #define CONFIG_SYS_NS16550_SERIAL 46 /* ns16550 reg in the low bits of cpu reg */ 47 #define CONFIG_SYS_NS16550_CLK 24000000 48 #ifndef CONFIG_DM_SERIAL 49 # define CONFIG_SYS_NS16550_REG_SIZE -4 50 # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 51 # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 52 # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 53 # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 54 # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE 55 #endif 56 57 /* DRAM Base */ 58 #define CONFIG_SYS_SDRAM_BASE 0x40000000 59 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 60 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 61 62 #define CONFIG_SYS_INIT_SP_OFFSET \ 63 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 64 #define CONFIG_SYS_INIT_SP_ADDR \ 65 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 66 67 #define CONFIG_NR_DRAM_BANKS 1 68 #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 69 #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 70 71 #ifdef CONFIG_AHCI 72 #define CONFIG_LIBATA 73 #define CONFIG_SCSI_AHCI 74 #define CONFIG_SCSI_AHCI_PLAT 75 #define CONFIG_SUNXI_AHCI 76 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 77 #define CONFIG_SYS_SCSI_MAX_LUN 1 78 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 79 CONFIG_SYS_SCSI_MAX_LUN) 80 #define CONFIG_CMD_SCSI 81 #endif 82 83 #define CONFIG_CMD_MEMORY 84 #define CONFIG_CMD_SETEXPR 85 86 #define CONFIG_SETUP_MEMORY_TAGS 87 #define CONFIG_CMDLINE_TAG 88 #define CONFIG_INITRD_TAG 89 90 /* mmc config */ 91 #if !defined(CONFIG_UART0_PORT_F) 92 #define CONFIG_MMC 93 #define CONFIG_GENERIC_MMC 94 #define CONFIG_CMD_MMC 95 #define CONFIG_MMC_SUNXI 96 #define CONFIG_MMC_SUNXI_SLOT 0 97 #define CONFIG_ENV_IS_IN_MMC 98 #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 99 #endif 100 101 /* 4MB of malloc() pool */ 102 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 103 104 /* 105 * Miscellaneous configurable options 106 */ 107 #define CONFIG_CMD_ECHO 108 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 109 #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ 110 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 111 #define CONFIG_SYS_GENERIC_BOARD 112 113 /* Boot Argument Buffer Size */ 114 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 115 116 #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 117 118 /* standalone support */ 119 #define CONFIG_STANDALONE_LOAD_ADDR 0x42000000 120 121 /* baudrate */ 122 #define CONFIG_BAUDRATE 115200 123 124 /* The stack sizes are set up in start.S using the settings below */ 125 #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 126 127 /* FLASH and environment organization */ 128 129 #define CONFIG_SYS_NO_FLASH 130 131 #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */ 132 #define CONFIG_IDENT_STRING " Allwinner Technology" 133 134 #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 135 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 136 137 #include <config_cmd_default.h> 138 #undef CONFIG_CMD_FPGA 139 140 #define CONFIG_FAT_WRITE /* enable write access */ 141 142 #define CONFIG_SPL_FRAMEWORK 143 #define CONFIG_SPL_LIBCOMMON_SUPPORT 144 #define CONFIG_SPL_SERIAL_SUPPORT 145 #define CONFIG_SPL_LIBGENERIC_SUPPORT 146 147 #ifdef CONFIG_SPL_FEL 148 149 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds" 150 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi" 151 #define CONFIG_SPL_TEXT_BASE 0x2000 152 #define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */ 153 154 #else /* CONFIG_SPL */ 155 156 #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 157 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */ 158 159 #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 160 #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 161 162 #define CONFIG_SPL_LIBDISK_SUPPORT 163 #define CONFIG_SPL_MMC_SUPPORT 164 165 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 166 167 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 168 #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 169 170 #endif /* CONFIG_SPL */ 171 172 /* end of 32 KiB in sram */ 173 #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 174 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 175 #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 176 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ 177 178 /* I2C */ 179 #define CONFIG_SPL_I2C_SUPPORT 180 #define CONFIG_SYS_I2C 181 #define CONFIG_SYS_I2C_MVTWSI 182 #define CONFIG_SYS_I2C_SPEED 400000 183 #define CONFIG_SYS_I2C_SLAVE 0x7f 184 #define CONFIG_CMD_I2C 185 186 /* PMU */ 187 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER 188 #define CONFIG_SPL_POWER_SUPPORT 189 #endif 190 191 #ifndef CONFIG_CONS_INDEX 192 #define CONFIG_CONS_INDEX 1 /* UART0 */ 193 #endif 194 195 /* GPIO */ 196 #define CONFIG_SUNXI_GPIO 197 #define CONFIG_SPL_GPIO_SUPPORT 198 #define CONFIG_CMD_GPIO 199 200 /* Ethernet support */ 201 #ifdef CONFIG_SUNXI_EMAC 202 #define CONFIG_MII /* MII PHY management */ 203 #endif 204 205 #ifdef CONFIG_SUNXI_GMAC 206 #define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */ 207 #define CONFIG_DW_AUTONEG 208 #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 209 #define CONFIG_PHY_ADDR 1 210 #define CONFIG_MII /* MII PHY management */ 211 #define CONFIG_PHYLIB 212 #endif 213 214 #ifdef CONFIG_USB_EHCI 215 #define CONFIG_CMD_USB 216 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 217 #define CONFIG_USB_STORAGE 218 #endif 219 220 #if !defined CONFIG_ENV_IS_IN_MMC && \ 221 !defined CONFIG_ENV_IS_IN_NAND && \ 222 !defined CONFIG_ENV_IS_IN_FAT && \ 223 !defined CONFIG_ENV_IS_IN_SPI_FLASH 224 #define CONFIG_ENV_IS_NOWHERE 225 #endif 226 227 #define CONFIG_MISC_INIT_R 228 229 #ifndef CONFIG_SPL_BUILD 230 #include <config_distro_defaults.h> 231 232 /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 233 * 1M script, 1M pxe and the ramdisk at the end */ 234 #define MEM_LAYOUT_ENV_SETTINGS \ 235 "bootm_size=0x10000000\0" \ 236 "kernel_addr_r=0x42000000\0" \ 237 "fdt_addr_r=0x43000000\0" \ 238 "scriptaddr=0x43100000\0" \ 239 "pxefile_addr_r=0x43200000\0" \ 240 "ramdisk_addr_r=0x43300000\0" 241 242 #ifdef CONFIG_MMC 243 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 244 #else 245 #define BOOT_TARGET_DEVICES_MMC(func) 246 #endif 247 248 #ifdef CONFIG_AHCI 249 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 250 #else 251 #define BOOT_TARGET_DEVICES_SCSI(func) 252 #endif 253 254 #ifdef CONFIG_USB_EHCI 255 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 256 #else 257 #define BOOT_TARGET_DEVICES_USB(func) 258 #endif 259 260 #define BOOT_TARGET_DEVICES(func) \ 261 BOOT_TARGET_DEVICES_MMC(func) \ 262 BOOT_TARGET_DEVICES_SCSI(func) \ 263 BOOT_TARGET_DEVICES_USB(func) \ 264 func(PXE, pxe, na) \ 265 func(DHCP, dhcp, na) 266 267 #include <config_distro_bootcmd.h> 268 269 #define CONFIG_EXTRA_ENV_SETTINGS \ 270 MEM_LAYOUT_ENV_SETTINGS \ 271 "fdtfile=" CONFIG_FDTFILE "\0" \ 272 "console=ttyS0,115200\0" \ 273 BOOTENV 274 275 #else /* ifndef CONFIG_SPL_BUILD */ 276 #define CONFIG_EXTRA_ENV_SETTINGS 277 #endif 278 279 #endif /* _SUNXI_COMMON_CONFIG_H */ 280