1 /*
2  * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3  *
4  * (C) Copyright 2007-2011
5  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6  * Tom Cubie <tangliang@allwinnertech.com>
7  *
8  * Configuration settings for the Allwinner sunxi series of boards.
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef _SUNXI_COMMON_CONFIG_H
14 #define _SUNXI_COMMON_CONFIG_H
15 
16 /*
17  * High Level Configuration Options
18  */
19 #define CONFIG_SUNXI		/* sunxi family */
20 #ifdef CONFIG_SPL_BUILD
21 #ifndef CONFIG_SPL_FEL
22 #define CONFIG_SYS_THUMB_BUILD	/* Thumbs mode to save space in SPL */
23 #endif
24 #endif
25 
26 #include <asm/arch/cpu.h>	/* get chip and board defs */
27 
28 #define CONFIG_SYS_TEXT_BASE		0x4a000000
29 
30 /*
31  * Display CPU information
32  */
33 #define CONFIG_DISPLAY_CPUINFO
34 
35 /* Serial & console */
36 #define CONFIG_SYS_NS16550
37 #define CONFIG_SYS_NS16550_SERIAL
38 /* ns16550 reg in the low bits of cpu reg */
39 #define CONFIG_SYS_NS16550_REG_SIZE	-4
40 #define CONFIG_SYS_NS16550_CLK		24000000
41 #define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
42 #define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
43 #define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
44 #define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
45 
46 /* DRAM Base */
47 #define CONFIG_SYS_SDRAM_BASE		0x40000000
48 #define CONFIG_SYS_INIT_RAM_ADDR	0x0
49 #define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
50 
51 #define CONFIG_SYS_INIT_SP_OFFSET \
52 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
53 #define CONFIG_SYS_INIT_SP_ADDR \
54 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
55 
56 #define CONFIG_NR_DRAM_BANKS		1
57 #define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
58 #define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */
59 
60 #ifdef CONFIG_AHCI
61 #define CONFIG_LIBATA
62 #define CONFIG_SCSI_AHCI
63 #define CONFIG_SCSI_AHCI_PLAT
64 #define CONFIG_SUNXI_AHCI
65 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
66 #define CONFIG_SYS_SCSI_MAX_LUN		1
67 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
68 					 CONFIG_SYS_SCSI_MAX_LUN)
69 #define CONFIG_CMD_SCSI
70 #endif
71 
72 #define CONFIG_CMD_MEMORY
73 #define CONFIG_CMD_SETEXPR
74 
75 #define CONFIG_SETUP_MEMORY_TAGS
76 #define CONFIG_CMDLINE_TAG
77 #define CONFIG_INITRD_TAG
78 
79 /* mmc config */
80 #define CONFIG_MMC
81 #define CONFIG_GENERIC_MMC
82 #define CONFIG_CMD_MMC
83 #define CONFIG_MMC_SUNXI
84 #define CONFIG_MMC_SUNXI_SLOT		0
85 #define CONFIG_ENV_IS_IN_MMC
86 #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
87 
88 /* 4MB of malloc() pool */
89 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (4 << 20))
90 
91 /*
92  * Miscellaneous configurable options
93  */
94 #define CONFIG_CMD_ECHO
95 #define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
96 #define CONFIG_SYS_PBSIZE	384	/* Print Buffer Size */
97 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
98 #define CONFIG_SYS_GENERIC_BOARD
99 
100 /* Boot Argument Buffer Size */
101 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
102 
103 #define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
104 
105 /* standalone support */
106 #define CONFIG_STANDALONE_LOAD_ADDR	0x42000000
107 
108 #define CONFIG_SYS_HZ			1000
109 
110 /* baudrate */
111 #define CONFIG_BAUDRATE			115200
112 
113 /* The stack sizes are set up in start.S using the settings below */
114 #define CONFIG_STACKSIZE		(256 << 10)	/* 256 KiB */
115 
116 /* FLASH and environment organization */
117 
118 #define CONFIG_SYS_NO_FLASH
119 
120 #define CONFIG_SYS_MONITOR_LEN		(512 << 10)	/* 512 KiB */
121 #define CONFIG_IDENT_STRING		" Allwinner Technology"
122 
123 #define CONFIG_ENV_OFFSET		(544 << 10) /* (8 + 24 + 512) KiB */
124 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
125 
126 #include <config_cmd_default.h>
127 #undef CONFIG_CMD_FPGA
128 
129 #define CONFIG_FAT_WRITE	/* enable write access */
130 
131 #define CONFIG_SPL_FRAMEWORK
132 #define CONFIG_SPL_LIBCOMMON_SUPPORT
133 #define CONFIG_SPL_SERIAL_SUPPORT
134 #define CONFIG_SPL_LIBGENERIC_SUPPORT
135 
136 #ifdef CONFIG_SPL_FEL
137 
138 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
139 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
140 #define CONFIG_SPL_TEXT_BASE		0x2000
141 #define CONFIG_SPL_MAX_SIZE		0x4000		/* 16 KiB */
142 
143 #else /* CONFIG_SPL */
144 
145 #define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
146 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KiB */
147 
148 #define CONFIG_SPL_TEXT_BASE		0x20		/* sram start+header */
149 #define CONFIG_SPL_MAX_SIZE		0x5fe0		/* 24KB on sun4i/sun7i */
150 
151 #define CONFIG_SPL_LIBDISK_SUPPORT
152 #define CONFIG_SPL_MMC_SUPPORT
153 
154 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
155 
156 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	80	/* 40KiB */
157 #define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */
158 
159 #endif /* CONFIG_SPL */
160 
161 /* end of 32 KiB in sram */
162 #define LOW_LEVEL_SRAM_STACK		0x00008000 /* End of sram */
163 #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
164 #define CONFIG_SYS_SPL_MALLOC_START	0x4ff00000
165 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00080000	/* 512 KiB */
166 
167 /* I2C */
168 #define CONFIG_SPL_I2C_SUPPORT
169 #define CONFIG_SYS_I2C
170 #define CONFIG_SYS_I2C_MVTWSI
171 #define CONFIG_SYS_I2C_SPEED		400000
172 #define CONFIG_SYS_I2C_SLAVE		0x7f
173 #define CONFIG_CMD_I2C
174 
175 /* PMU */
176 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
177 #define CONFIG_SPL_POWER_SUPPORT
178 #endif
179 
180 #ifndef CONFIG_CONS_INDEX
181 #define CONFIG_CONS_INDEX              1       /* UART0 */
182 #endif
183 
184 /* GPIO */
185 #define CONFIG_SUNXI_GPIO
186 #define CONFIG_CMD_GPIO
187 
188 /* Ethernet support */
189 #ifdef CONFIG_SUNXI_EMAC
190 #define CONFIG_MII			/* MII PHY management		*/
191 #endif
192 
193 #ifdef CONFIG_SUNXI_GMAC
194 #define CONFIG_DESIGNWARE_ETH		/* GMAC can use designware driver */
195 #define CONFIG_DW_AUTONEG
196 #define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
197 #define CONFIG_PHY_ADDR		1
198 #define CONFIG_MII			/* MII PHY management		*/
199 #define CONFIG_PHYLIB
200 #endif
201 
202 #ifdef CONFIG_USB_EHCI
203 #define CONFIG_CMD_USB
204 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
205 #define CONFIG_USB_STORAGE
206 #endif
207 
208 #if !defined CONFIG_ENV_IS_IN_MMC && \
209     !defined CONFIG_ENV_IS_IN_NAND && \
210     !defined CONFIG_ENV_IS_IN_FAT && \
211     !defined CONFIG_ENV_IS_IN_SPI_FLASH
212 #define CONFIG_ENV_IS_NOWHERE
213 #endif
214 
215 #define CONFIG_MISC_INIT_R
216 
217 #ifndef CONFIG_SPL_BUILD
218 #include <config_distro_defaults.h>
219 
220 /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
221  * 1M script, 1M pxe and the ramdisk at the end */
222 #define MEM_LAYOUT_ENV_SETTINGS \
223 	"bootm_size=0x10000000\0" \
224 	"kernel_addr_r=0x42000000\0" \
225 	"fdt_addr_r=0x43000000\0" \
226 	"scriptaddr=0x43100000\0" \
227 	"pxefile_addr_r=0x43200000\0" \
228 	"ramdisk_addr_r=0x43300000\0"
229 
230 #ifdef CONFIG_AHCI
231 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
232 #else
233 #define BOOT_TARGET_DEVICES_SCSI(func)
234 #endif
235 
236 #define BOOT_TARGET_DEVICES(func) \
237 	func(MMC, mmc, 0) \
238 	BOOT_TARGET_DEVICES_SCSI(func) \
239 	func(USB, usb, 0) \
240 	func(PXE, pxe, na) \
241 	func(DHCP, dhcp, na)
242 
243 #include <config_distro_bootcmd.h>
244 
245 #define CONFIG_EXTRA_ENV_SETTINGS \
246 	MEM_LAYOUT_ENV_SETTINGS \
247 	"fdtfile=" CONFIG_FTDFILE "\0" \
248 	"console=ttyS0,115200\0" \
249 	BOOTENV
250 
251 #else /* ifndef CONFIG_SPL_BUILD */
252 #define CONFIG_EXTRA_ENV_SETTINGS
253 #endif
254 
255 #endif /* _SUNXI_COMMON_CONFIG_H */
256