1 /* 2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3 * 4 * (C) Copyright 2007-2011 5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6 * Tom Cubie <tangliang@allwinnertech.com> 7 * 8 * Configuration settings for the Allwinner sunxi series of boards. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef _SUNXI_COMMON_CONFIG_H 14 #define _SUNXI_COMMON_CONFIG_H 15 16 #include <linux/stringify.h> 17 18 #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 19 /* 20 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the 21 * expense of restricting some features, so the regular machine id values can 22 * be used. 23 */ 24 # define CONFIG_MACH_TYPE_COMPAT_REV 0 25 #else 26 /* 27 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. 28 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass 29 * beyond the machine id check. 30 */ 31 # define CONFIG_MACH_TYPE_COMPAT_REV 1 32 #endif 33 34 /* 35 * High Level Configuration Options 36 */ 37 #define CONFIG_SUNXI /* sunxi family */ 38 #ifdef CONFIG_SPL_BUILD 39 #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 40 #endif 41 42 #include <asm/arch/cpu.h> /* get chip and board defs */ 43 44 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL) 45 # define CONFIG_DW_SERIAL 46 #endif 47 48 /* 49 * Display CPU information 50 */ 51 #define CONFIG_DISPLAY_CPUINFO 52 53 #define CONFIG_SYS_PROMPT "sunxi# " 54 55 /* Serial & console */ 56 #define CONFIG_SYS_NS16550 57 #define CONFIG_SYS_NS16550_SERIAL 58 /* ns16550 reg in the low bits of cpu reg */ 59 #define CONFIG_SYS_NS16550_CLK 24000000 60 #ifndef CONFIG_DM_SERIAL 61 # define CONFIG_SYS_NS16550_REG_SIZE -4 62 # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 63 # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 64 # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 65 # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 66 # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE 67 #endif 68 69 /* CPU */ 70 #define CONFIG_SYS_CACHELINE_SIZE 64 71 72 /* 73 * The DRAM Base differs between some models. We cannot use macros for the 74 * CONFIG_FOO defines which contain the DRAM base address since they end 75 * up unexpanded in include/autoconf.mk . 76 * 77 * So we have to have this #ifdef #else #endif block for these. 78 */ 79 #ifdef CONFIG_MACH_SUN9I 80 #define SDRAM_OFFSET(x) 0x2##x 81 #define CONFIG_SYS_SDRAM_BASE 0x20000000 82 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ 83 #define CONFIG_SYS_TEXT_BASE 0x2a000000 84 #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000 85 #define CONFIG_SYS_SPL_MALLOC_START 0x2ff00000 86 #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 87 #else 88 #define SDRAM_OFFSET(x) 0x4##x 89 #define CONFIG_SYS_SDRAM_BASE 0x40000000 90 #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 91 #define CONFIG_SYS_TEXT_BASE 0x4a000000 92 #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 93 #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 94 #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 95 #endif 96 97 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ 98 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ 99 100 #ifdef CONFIG_MACH_SUN9I 101 /* 102 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is 103 * slightly bigger. Note that it is possible to map the first 32 KiB of the 104 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the 105 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and 106 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. 107 */ 108 #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 109 #define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */ 110 #else 111 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 112 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 113 #endif 114 115 #define CONFIG_SYS_INIT_SP_OFFSET \ 116 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 117 #define CONFIG_SYS_INIT_SP_ADDR \ 118 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 119 120 #define CONFIG_NR_DRAM_BANKS 1 121 #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 122 #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 123 124 #ifdef CONFIG_AHCI 125 #define CONFIG_LIBATA 126 #define CONFIG_SCSI_AHCI 127 #define CONFIG_SCSI_AHCI_PLAT 128 #define CONFIG_SUNXI_AHCI 129 #define CONFIG_SYS_64BIT_LBA 130 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 131 #define CONFIG_SYS_SCSI_MAX_LUN 1 132 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 133 CONFIG_SYS_SCSI_MAX_LUN) 134 #define CONFIG_CMD_SCSI 135 #endif 136 137 #define CONFIG_CMD_MEMORY 138 139 #define CONFIG_SETUP_MEMORY_TAGS 140 #define CONFIG_CMDLINE_TAG 141 #define CONFIG_INITRD_TAG 142 #define CONFIG_SERIAL_TAG 143 144 /* mmc config */ 145 #if !defined(CONFIG_UART0_PORT_F) 146 #define CONFIG_MMC 147 #define CONFIG_GENERIC_MMC 148 #define CONFIG_CMD_MMC 149 #define CONFIG_MMC_SUNXI 150 #define CONFIG_MMC_SUNXI_SLOT 0 151 #if !defined(CONFIG_SPL_NAND_SUPPORT) 152 #define CONFIG_ENV_IS_IN_MMC 153 #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 154 #endif /* CONFIG_SPL_NAND_SUPPORT */ 155 #endif 156 157 /* 4MB of malloc() pool */ 158 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 159 160 /* 161 * Miscellaneous configurable options 162 */ 163 #define CONFIG_CMD_ECHO 164 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 165 #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ 166 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 167 #define CONFIG_SYS_GENERIC_BOARD 168 169 /* Boot Argument Buffer Size */ 170 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 171 172 /* standalone support */ 173 #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR 174 175 /* baudrate */ 176 #define CONFIG_BAUDRATE 115200 177 178 /* The stack sizes are set up in start.S using the settings below */ 179 #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 180 181 /* FLASH and environment organization */ 182 183 #define CONFIG_SYS_NO_FLASH 184 185 #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */ 186 #define CONFIG_IDENT_STRING " Allwinner Technology" 187 188 #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 189 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 190 191 #include <config_cmd_default.h> 192 #undef CONFIG_CMD_FPGA 193 194 #define CONFIG_FAT_WRITE /* enable write access */ 195 196 #define CONFIG_SPL_FRAMEWORK 197 #define CONFIG_SPL_LIBCOMMON_SUPPORT 198 #define CONFIG_SPL_SERIAL_SUPPORT 199 #define CONFIG_SPL_LIBGENERIC_SUPPORT 200 201 #define CONFIG_SPL_BOARD_LOAD_IMAGE 202 203 #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 204 #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 205 206 #define CONFIG_SPL_LIBDISK_SUPPORT 207 208 #if !defined(CONFIG_UART0_PORT_F) 209 #define CONFIG_SPL_MMC_SUPPORT 210 #endif 211 212 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 213 214 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 215 #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 216 217 /* end of 32 KiB in sram */ 218 #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 219 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 220 221 /* I2C */ 222 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER 223 #define CONFIG_SPL_I2C_SUPPORT 224 #endif 225 226 #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ 227 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ 228 defined CONFIG_I2C4_ENABLE 229 #define CONFIG_SYS_I2C 230 #define CONFIG_SYS_I2C_MVTWSI 231 #define CONFIG_SYS_I2C_SPEED 400000 232 #define CONFIG_SYS_I2C_SLAVE 0x7f 233 #define CONFIG_CMD_I2C 234 #endif 235 236 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) 237 #define CONFIG_SYS_I2C_SOFT 238 #define CONFIG_SYS_I2C_SOFT_SPEED 50000 239 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 240 /* We use pin names in Kconfig and sunxi_name_to_gpio() */ 241 #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda 242 #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl 243 #ifndef __ASSEMBLY__ 244 extern int soft_i2c_gpio_sda; 245 extern int soft_i2c_gpio_scl; 246 #endif 247 #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ 248 #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ 249 #else 250 #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ 251 #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ 252 #endif 253 254 /* PMU */ 255 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER 256 #define CONFIG_SPL_POWER_SUPPORT 257 #endif 258 259 #ifndef CONFIG_CONS_INDEX 260 #define CONFIG_CONS_INDEX 1 /* UART0 */ 261 #endif 262 263 #if CONFIG_CONS_INDEX == 1 264 #ifdef CONFIG_MACH_SUN9I 265 #define OF_STDOUT_PATH "/soc/serial@07000000:115200" 266 #else 267 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" 268 #endif 269 #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) 270 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" 271 #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) 272 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" 273 #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) 274 #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" 275 #else 276 #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. 277 #endif 278 279 /* GPIO */ 280 #define CONFIG_SUNXI_GPIO 281 #define CONFIG_SPL_GPIO_SUPPORT 282 #define CONFIG_CMD_GPIO 283 284 #ifdef CONFIG_VIDEO 285 /* 286 * The amount of RAM to keep free at the top of RAM when relocating u-boot, 287 * to use as framebuffer. This must be a multiple of 4096. 288 */ 289 #define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20) 290 291 /* Do we want to initialize a simple FB? */ 292 #define CONFIG_VIDEO_DT_SIMPLEFB 293 294 #define CONFIG_VIDEO_SUNXI 295 296 #define CONFIG_CFB_CONSOLE 297 #define CONFIG_VIDEO_SW_CURSOR 298 #define CONFIG_VIDEO_LOGO 299 #define CONFIG_VIDEO_STD_TIMINGS 300 #define CONFIG_I2C_EDID 301 302 /* allow both serial and cfb console. */ 303 #define CONFIG_CONSOLE_MUX 304 /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ 305 #define CONFIG_VGA_AS_SINGLE_DEVICE 306 307 /* To be able to hook simplefb into dt */ 308 #ifdef CONFIG_VIDEO_DT_SIMPLEFB 309 #define CONFIG_OF_BOARD_SETUP 310 #endif 311 312 #endif /* CONFIG_VIDEO */ 313 314 /* Ethernet support */ 315 #ifdef CONFIG_SUNXI_EMAC 316 #define CONFIG_PHY_ADDR 1 317 #define CONFIG_MII /* MII PHY management */ 318 #define CONFIG_PHYLIB 319 #endif 320 321 #ifdef CONFIG_SUNXI_GMAC 322 #define CONFIG_DW_AUTONEG 323 #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 324 #define CONFIG_PHY_ADDR 1 325 #define CONFIG_MII /* MII PHY management */ 326 #define CONFIG_PHYLIB 327 #endif 328 329 #ifdef CONFIG_USB_EHCI 330 #define CONFIG_USB_OHCI_NEW 331 #define CONFIG_USB_OHCI_SUNXI 332 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 333 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 334 #endif 335 336 #ifdef CONFIG_USB_MUSB_SUNXI 337 #define CONFIG_MUSB_HOST 338 #define CONFIG_MUSB_PIO_ONLY 339 #endif 340 341 #if defined CONFIG_USB_EHCI || defined CONFIG_USB_MUSB_SUNXI 342 #define CONFIG_CMD_USB 343 #define CONFIG_USB_STORAGE 344 #endif 345 346 #ifdef CONFIG_USB_KEYBOARD 347 #define CONFIG_CONSOLE_MUX 348 #define CONFIG_PREBOOT 349 #define CONFIG_SYS_STDIO_DEREGISTER 350 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 351 #endif 352 353 #if !defined CONFIG_ENV_IS_IN_MMC && \ 354 !defined CONFIG_ENV_IS_IN_NAND && \ 355 !defined CONFIG_ENV_IS_IN_FAT && \ 356 !defined CONFIG_ENV_IS_IN_SPI_FLASH 357 #define CONFIG_ENV_IS_NOWHERE 358 #endif 359 360 #ifdef CONFIG_SPL_NAND_SUPPORT 361 #define CONFIG_NAND 362 #define CONFIG_SYS_NAND_SELF_INIT 363 #define CONFIG_NAND_SUNXI 364 #define CONFIG_CMD_SPL_WRITE_SIZE 0x000400 365 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x008000 366 367 /* \todo Make these parameterisable in kernel config ? */ 368 #define CONFIG_NAND_SUNXI_PAGE_SIZE 8192 369 #define CONFIG_NAND_SUNXI_ECC_STEP 1024 370 #define CONFIG_NAND_SUNXI_ECC_STRENGTH 40 371 #define CONFIG_NAND_SUNXI_ADDR_CYCLES 5 372 373 #ifndef CONFIG_NAND_SUNXI_GPC_PORTS 374 #error "No NAND GPC ports defined, NAND unsupported" 375 #endif 376 #endif /* CONFIG_SPL_NAND_SUPPORT */ 377 378 #define CONFIG_MISC_INIT_R 379 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 380 381 #ifndef CONFIG_SPL_BUILD 382 #include <config_distro_defaults.h> 383 384 /* Enable pre-console buffer to get complete log on the VGA console */ 385 #define CONFIG_PRE_CONSOLE_BUFFER 386 #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */ 387 388 /* 389 * 240M RAM (256M minimum minus space for the framebuffer), 390 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 391 * 1M script, 1M pxe and the ramdisk at the end. 392 */ 393 #define MEM_LAYOUT_ENV_SETTINGS \ 394 "bootm_size=0xf000000\0" \ 395 "kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \ 396 "fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \ 397 "scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \ 398 "pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \ 399 "ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0" 400 401 #ifdef CONFIG_MMC 402 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 403 #else 404 #define BOOT_TARGET_DEVICES_MMC(func) 405 #endif 406 407 #ifdef CONFIG_AHCI 408 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 409 #else 410 #define BOOT_TARGET_DEVICES_SCSI(func) 411 #endif 412 413 #ifdef CONFIG_USB_EHCI 414 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 415 #else 416 #define BOOT_TARGET_DEVICES_USB(func) 417 #endif 418 419 #define BOOT_TARGET_DEVICES(func) \ 420 BOOT_TARGET_DEVICES_MMC(func) \ 421 BOOT_TARGET_DEVICES_SCSI(func) \ 422 BOOT_TARGET_DEVICES_USB(func) \ 423 func(PXE, pxe, na) \ 424 func(DHCP, dhcp, na) 425 426 #include <config_distro_bootcmd.h> 427 428 #ifdef CONFIG_USB_KEYBOARD 429 #define CONSOLE_STDIN_SETTINGS \ 430 "preboot=usb start\0" \ 431 "stdin=serial,usbkbd\0" 432 #else 433 #define CONSOLE_STDIN_SETTINGS \ 434 "stdin=serial\0" 435 #endif 436 437 #ifdef CONFIG_VIDEO 438 #define CONSOLE_STDOUT_SETTINGS \ 439 "stdout=serial,vga\0" \ 440 "stderr=serial,vga\0" 441 #else 442 #define CONSOLE_STDOUT_SETTINGS \ 443 "stdout=serial\0" \ 444 "stderr=serial\0" 445 #endif 446 447 #define CONSOLE_ENV_SETTINGS \ 448 CONSOLE_STDIN_SETTINGS \ 449 CONSOLE_STDOUT_SETTINGS 450 451 #define CONFIG_EXTRA_ENV_SETTINGS \ 452 CONSOLE_ENV_SETTINGS \ 453 MEM_LAYOUT_ENV_SETTINGS \ 454 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ 455 "console=ttyS0,115200\0" \ 456 BOOTENV 457 458 #else /* ifndef CONFIG_SPL_BUILD */ 459 #define CONFIG_EXTRA_ENV_SETTINGS 460 #endif 461 462 #endif /* _SUNXI_COMMON_CONFIG_H */ 463