1 /* 2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3 * 4 * (C) Copyright 2007-2011 5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6 * Tom Cubie <tangliang@allwinnertech.com> 7 * 8 * Configuration settings for the Allwinner sunxi series of boards. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef _SUNXI_COMMON_CONFIG_H 14 #define _SUNXI_COMMON_CONFIG_H 15 16 #include <linux/stringify.h> 17 18 #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 19 /* 20 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the 21 * expense of restricting some features, so the regular machine id values can 22 * be used. 23 */ 24 # define CONFIG_MACH_TYPE_COMPAT_REV 0 25 #else 26 /* 27 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. 28 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass 29 * beyond the machine id check. 30 */ 31 # define CONFIG_MACH_TYPE_COMPAT_REV 1 32 #endif 33 34 /* 35 * High Level Configuration Options 36 */ 37 #define CONFIG_SUNXI /* sunxi family */ 38 #ifdef CONFIG_SPL_BUILD 39 #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 40 #endif 41 42 #include <asm/arch/cpu.h> /* get chip and board defs */ 43 44 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL) 45 # define CONFIG_DW_SERIAL 46 #endif 47 48 /* 49 * Display CPU information 50 */ 51 #define CONFIG_DISPLAY_CPUINFO 52 53 #define CONFIG_SYS_PROMPT "sunxi# " 54 55 /* Serial & console */ 56 #define CONFIG_SYS_NS16550 57 #define CONFIG_SYS_NS16550_SERIAL 58 /* ns16550 reg in the low bits of cpu reg */ 59 #define CONFIG_SYS_NS16550_CLK 24000000 60 #ifndef CONFIG_DM_SERIAL 61 # define CONFIG_SYS_NS16550_REG_SIZE -4 62 # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 63 # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 64 # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 65 # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 66 # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE 67 #endif 68 69 /* CPU */ 70 #define CONFIG_SYS_CACHELINE_SIZE 64 71 72 /* 73 * The DRAM Base differs between some models. We cannot use macros for the 74 * CONFIG_FOO defines which contain the DRAM base address since they end 75 * up unexpanded in include/autoconf.mk . 76 * 77 * So we have to have this #ifdef #else #endif block for these. 78 */ 79 #ifdef CONFIG_MACH_SUN9I 80 #define SDRAM_OFFSET(x) 0x2##x 81 #define CONFIG_SYS_SDRAM_BASE 0x20000000 82 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ 83 #define CONFIG_SYS_TEXT_BASE 0x2a000000 84 #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000 85 #define CONFIG_SYS_SPL_MALLOC_START 0x2ff00000 86 #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 87 #else 88 #define SDRAM_OFFSET(x) 0x4##x 89 #define CONFIG_SYS_SDRAM_BASE 0x40000000 90 #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 91 #define CONFIG_SYS_TEXT_BASE 0x4a000000 92 #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 93 #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 94 #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 95 #endif 96 97 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ 98 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ 99 100 #ifdef CONFIG_MACH_SUN9I 101 /* 102 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is 103 * slightly bigger. Note that it is possible to map the first 32 KiB of the 104 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the 105 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and 106 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. 107 */ 108 #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 109 #define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */ 110 #else 111 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 112 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 113 #endif 114 115 #define CONFIG_SYS_INIT_SP_OFFSET \ 116 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 117 #define CONFIG_SYS_INIT_SP_ADDR \ 118 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 119 120 #define CONFIG_NR_DRAM_BANKS 1 121 #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 122 #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 123 124 #ifdef CONFIG_AHCI 125 #define CONFIG_LIBATA 126 #define CONFIG_SCSI_AHCI 127 #define CONFIG_SCSI_AHCI_PLAT 128 #define CONFIG_SUNXI_AHCI 129 #define CONFIG_SYS_64BIT_LBA 130 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 131 #define CONFIG_SYS_SCSI_MAX_LUN 1 132 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 133 CONFIG_SYS_SCSI_MAX_LUN) 134 #define CONFIG_CMD_SCSI 135 #endif 136 137 #define CONFIG_SETUP_MEMORY_TAGS 138 #define CONFIG_CMDLINE_TAG 139 #define CONFIG_INITRD_TAG 140 #define CONFIG_SERIAL_TAG 141 142 /* mmc config */ 143 #if !defined(CONFIG_UART0_PORT_F) 144 #define CONFIG_MMC 145 #define CONFIG_GENERIC_MMC 146 #define CONFIG_CMD_MMC 147 #define CONFIG_MMC_SUNXI 148 #define CONFIG_MMC_SUNXI_SLOT 0 149 #define CONFIG_ENV_IS_IN_MMC 150 #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 151 #endif 152 153 /* 4MB of malloc() pool */ 154 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 155 156 /* 157 * Miscellaneous configurable options 158 */ 159 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 160 #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ 161 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 162 #define CONFIG_SYS_GENERIC_BOARD 163 164 /* Boot Argument Buffer Size */ 165 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 166 167 /* standalone support */ 168 #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR 169 170 /* baudrate */ 171 #define CONFIG_BAUDRATE 115200 172 173 /* The stack sizes are set up in start.S using the settings below */ 174 #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 175 176 /* FLASH and environment organization */ 177 178 #define CONFIG_SYS_NO_FLASH 179 180 #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */ 181 #define CONFIG_IDENT_STRING " Allwinner Technology" 182 183 #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 184 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 185 186 #define CONFIG_FAT_WRITE /* enable write access */ 187 188 #define CONFIG_SPL_FRAMEWORK 189 #define CONFIG_SPL_LIBCOMMON_SUPPORT 190 #define CONFIG_SPL_SERIAL_SUPPORT 191 #define CONFIG_SPL_LIBGENERIC_SUPPORT 192 193 #define CONFIG_SPL_BOARD_LOAD_IMAGE 194 195 #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 196 #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 197 198 #define CONFIG_SPL_LIBDISK_SUPPORT 199 200 #if !defined(CONFIG_UART0_PORT_F) 201 #define CONFIG_SPL_MMC_SUPPORT 202 #endif 203 204 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 205 206 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 207 #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 208 209 /* end of 32 KiB in sram */ 210 #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 211 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 212 213 /* I2C */ 214 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER 215 #define CONFIG_SPL_I2C_SUPPORT 216 #endif 217 218 #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ 219 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ 220 defined CONFIG_I2C4_ENABLE 221 #define CONFIG_SYS_I2C 222 #define CONFIG_SYS_I2C_MVTWSI 223 #define CONFIG_SYS_I2C_SPEED 400000 224 #define CONFIG_SYS_I2C_SLAVE 0x7f 225 #define CONFIG_CMD_I2C 226 #endif 227 228 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) 229 #define CONFIG_SYS_I2C_SOFT 230 #define CONFIG_SYS_I2C_SOFT_SPEED 50000 231 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 232 /* We use pin names in Kconfig and sunxi_name_to_gpio() */ 233 #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda 234 #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl 235 #ifndef __ASSEMBLY__ 236 extern int soft_i2c_gpio_sda; 237 extern int soft_i2c_gpio_scl; 238 #endif 239 #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ 240 #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ 241 #else 242 #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ 243 #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ 244 #endif 245 246 /* PMU */ 247 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER 248 #define CONFIG_SPL_POWER_SUPPORT 249 #endif 250 251 #ifndef CONFIG_CONS_INDEX 252 #define CONFIG_CONS_INDEX 1 /* UART0 */ 253 #endif 254 255 #if CONFIG_CONS_INDEX == 1 256 #ifdef CONFIG_MACH_SUN9I 257 #define OF_STDOUT_PATH "/soc/serial@07000000:115200" 258 #else 259 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" 260 #endif 261 #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) 262 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" 263 #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) 264 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" 265 #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) 266 #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" 267 #else 268 #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. 269 #endif 270 271 /* GPIO */ 272 #define CONFIG_SUNXI_GPIO 273 #define CONFIG_SPL_GPIO_SUPPORT 274 #define CONFIG_CMD_GPIO 275 276 #ifdef CONFIG_VIDEO 277 /* 278 * The amount of RAM to keep free at the top of RAM when relocating u-boot, 279 * to use as framebuffer. This must be a multiple of 4096. 280 */ 281 #define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20) 282 283 /* Do we want to initialize a simple FB? */ 284 #define CONFIG_VIDEO_DT_SIMPLEFB 285 286 #define CONFIG_VIDEO_SUNXI 287 288 #define CONFIG_CFB_CONSOLE 289 #define CONFIG_VIDEO_SW_CURSOR 290 #define CONFIG_VIDEO_LOGO 291 #define CONFIG_VIDEO_STD_TIMINGS 292 #define CONFIG_I2C_EDID 293 294 /* allow both serial and cfb console. */ 295 #define CONFIG_CONSOLE_MUX 296 /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ 297 #define CONFIG_VGA_AS_SINGLE_DEVICE 298 299 /* To be able to hook simplefb into dt */ 300 #ifdef CONFIG_VIDEO_DT_SIMPLEFB 301 #define CONFIG_OF_BOARD_SETUP 302 #endif 303 304 #endif /* CONFIG_VIDEO */ 305 306 /* Ethernet support */ 307 #ifdef CONFIG_SUNXI_EMAC 308 #define CONFIG_PHY_ADDR 1 309 #define CONFIG_MII /* MII PHY management */ 310 #define CONFIG_PHYLIB 311 #endif 312 313 #ifdef CONFIG_SUNXI_GMAC 314 #define CONFIG_DW_AUTONEG 315 #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 316 #define CONFIG_PHY_ADDR 1 317 #define CONFIG_MII /* MII PHY management */ 318 #define CONFIG_PHYLIB 319 #endif 320 321 #ifdef CONFIG_USB_EHCI 322 #define CONFIG_USB_OHCI_NEW 323 #define CONFIG_USB_OHCI_SUNXI 324 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 325 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 326 #endif 327 328 #ifdef CONFIG_USB_MUSB_SUNXI 329 #define CONFIG_MUSB_HOST 330 #define CONFIG_MUSB_PIO_ONLY 331 #endif 332 333 #if defined CONFIG_USB_EHCI || defined CONFIG_USB_MUSB_SUNXI 334 #define CONFIG_CMD_USB 335 #define CONFIG_USB_STORAGE 336 #endif 337 338 #ifdef CONFIG_USB_KEYBOARD 339 #define CONFIG_CONSOLE_MUX 340 #define CONFIG_PREBOOT 341 #define CONFIG_SYS_STDIO_DEREGISTER 342 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 343 #endif 344 345 #if !defined CONFIG_ENV_IS_IN_MMC && \ 346 !defined CONFIG_ENV_IS_IN_NAND && \ 347 !defined CONFIG_ENV_IS_IN_FAT && \ 348 !defined CONFIG_ENV_IS_IN_SPI_FLASH 349 #define CONFIG_ENV_IS_NOWHERE 350 #endif 351 352 #define CONFIG_MISC_INIT_R 353 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 354 355 #ifndef CONFIG_SPL_BUILD 356 #include <config_distro_defaults.h> 357 358 /* Enable pre-console buffer to get complete log on the VGA console */ 359 #define CONFIG_PRE_CONSOLE_BUFFER 360 #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */ 361 362 /* 363 * 240M RAM (256M minimum minus space for the framebuffer), 364 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 365 * 1M script, 1M pxe and the ramdisk at the end. 366 */ 367 #define MEM_LAYOUT_ENV_SETTINGS \ 368 "bootm_size=0xf000000\0" \ 369 "kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \ 370 "fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \ 371 "scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \ 372 "pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \ 373 "ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0" 374 375 #ifdef CONFIG_MMC 376 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 377 #else 378 #define BOOT_TARGET_DEVICES_MMC(func) 379 #endif 380 381 #ifdef CONFIG_AHCI 382 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 383 #else 384 #define BOOT_TARGET_DEVICES_SCSI(func) 385 #endif 386 387 #ifdef CONFIG_USB_EHCI 388 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 389 #else 390 #define BOOT_TARGET_DEVICES_USB(func) 391 #endif 392 393 #define BOOT_TARGET_DEVICES(func) \ 394 BOOT_TARGET_DEVICES_MMC(func) \ 395 BOOT_TARGET_DEVICES_SCSI(func) \ 396 BOOT_TARGET_DEVICES_USB(func) \ 397 func(PXE, pxe, na) \ 398 func(DHCP, dhcp, na) 399 400 #include <config_distro_bootcmd.h> 401 402 #ifdef CONFIG_USB_KEYBOARD 403 #define CONSOLE_STDIN_SETTINGS \ 404 "preboot=usb start\0" \ 405 "stdin=serial,usbkbd\0" 406 #else 407 #define CONSOLE_STDIN_SETTINGS \ 408 "stdin=serial\0" 409 #endif 410 411 #ifdef CONFIG_VIDEO 412 #define CONSOLE_STDOUT_SETTINGS \ 413 "stdout=serial,vga\0" \ 414 "stderr=serial,vga\0" 415 #else 416 #define CONSOLE_STDOUT_SETTINGS \ 417 "stdout=serial\0" \ 418 "stderr=serial\0" 419 #endif 420 421 #define CONSOLE_ENV_SETTINGS \ 422 CONSOLE_STDIN_SETTINGS \ 423 CONSOLE_STDOUT_SETTINGS 424 425 #define CONFIG_EXTRA_ENV_SETTINGS \ 426 CONSOLE_ENV_SETTINGS \ 427 MEM_LAYOUT_ENV_SETTINGS \ 428 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ 429 "console=ttyS0,115200\0" \ 430 BOOTENV 431 432 #else /* ifndef CONFIG_SPL_BUILD */ 433 #define CONFIG_EXTRA_ENV_SETTINGS 434 #endif 435 436 #endif /* _SUNXI_COMMON_CONFIG_H */ 437