1 /* 2 * Copyright (C) 2014, STMicroelectronics - All Rights Reserved 3 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __CONFIG_STV0991_H 9 #define __CONFIG_STV0991_H 10 #define CONFIG_SYS_DCACHE_OFF 11 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH 12 13 /* ram memory-related information */ 14 #define CONFIG_NR_DRAM_BANKS 1 15 #define PHYS_SDRAM_1 0x00000000 16 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 17 #define PHYS_SDRAM_1_SIZE 0x00198000 18 19 #define CONFIG_ENV_SIZE 0x10000 20 #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 21 #define CONFIG_ENV_OFFSET 0x30000 22 #define CONFIG_ENV_ADDR \ 23 (PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE) 24 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024) 25 26 /* user interface */ 27 #define CONFIG_SYS_CBSIZE 1024 28 29 /* MISC */ 30 #define CONFIG_SYS_LOAD_ADDR 0x00000000 31 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 32 #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 33 #define CONFIG_SYS_INIT_SP_OFFSET \ 34 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 35 /* U-Boot Load Address */ 36 #define CONFIG_SYS_INIT_SP_ADDR \ 37 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 38 39 /* GMAC related configs */ 40 41 #define CONFIG_MII 42 #define CONFIG_DW_ALTDESCRIPTOR 43 44 /* Command support defines */ 45 #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ 46 47 #define CONFIG_SYS_MEMTEST_START 0x0000 48 #define CONFIG_SYS_MEMTEST_END 1024*1024 49 50 /* Misc configuration */ 51 52 #define CONFIG_BOOTCOMMAND "go 0x40040000" 53 54 /* 55 + * QSPI support 56 + */ 57 #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ 58 #define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000 59 60 #endif 61 62 #endif /* __CONFIG_H */ 63