1 /* 2 * (C) Copyright 2014 3 * Vikas Manocha, STMicroelectronics, <vikas.manocha@st.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __CONFIG_STV0991_H 9 #define __CONFIG_STV0991_H 10 #define CONFIG_SYS_DCACHE_OFF 11 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH 12 #define CONFIG_BOARD_EARLY_INIT_F 13 14 #define CONFIG_SYS_CORTEX_R4 15 16 #define CONFIG_SYS_GENERIC_BOARD 17 #define CONFIG_SYS_NO_FLASH 18 19 /* ram memory-related information */ 20 #define CONFIG_NR_DRAM_BANKS 1 21 #define PHYS_SDRAM_1 0x00000000 22 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 23 #define PHYS_SDRAM_1_SIZE 0x00198000 24 25 #define CONFIG_ENV_SIZE 0x10000 26 #define CONFIG_ENV_IS_IN_SPI_FLASH 27 #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 28 #define CONFIG_ENV_OFFSET 0x30000 29 #define CONFIG_ENV_ADDR \ 30 (PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE) 31 #define CONFIG_SYS_MAXARGS 16 32 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024) 33 34 /* serial port (PL011) configuration */ 35 #define CONFIG_BAUDRATE 115200 36 #define CONFIG_PL01X_SERIAL 37 38 /* user interface */ 39 #define CONFIG_SYS_CBSIZE 1024 40 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 41 +sizeof(CONFIG_SYS_PROMPT) + 16) 42 43 /* MISC */ 44 #define CONFIG_SYS_LOAD_ADDR 0x00000000 45 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 46 #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 47 #define CONFIG_SYS_INIT_SP_OFFSET \ 48 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 49 /* U-boot Load Address */ 50 #define CONFIG_SYS_TEXT_BASE 0x00010000 51 #define CONFIG_SYS_INIT_SP_ADDR \ 52 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 53 54 /* GMAC related configs */ 55 56 #define CONFIG_MII 57 #define CONFIG_PHYLIB 58 #define CONFIG_DW_ALTDESCRIPTOR 59 #define CONFIG_PHY_MICREL 60 61 /* Command support defines */ 62 #define CONFIG_CMD_PING 63 #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ 64 65 #define CONFIG_SYS_MEMTEST_START 0x0000 66 #define CONFIG_SYS_MEMTEST_END 1024*1024 67 #define CONFIG_CMD_MEMTEST 68 69 /* Misc configuration */ 70 #define CONFIG_SYS_LONGHELP 71 #define CONFIG_CMDLINE_EDITING 72 73 #define CONFIG_BOOTDELAY 3 74 #define CONFIG_BOOTCOMMAND "go 0x40040000" 75 76 #define CONFIG_OF_LIBFDT 77 78 /* 79 + * QSPI support 80 + */ 81 #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ 82 #define CONFIG_CADENCE_QSPI 83 #define CONFIG_CQSPI_DECODER 0 84 #define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000 85 #define CONFIG_CMD_SPI 86 87 #define CONFIG_SPI_FLASH_STMICRO /* Micron/Numonyx flash */ 88 #define CONFIG_SPI_FLASH_WINBOND /* WINBOND */ 89 #define CONFIG_CMD_SF 90 #endif 91 92 #endif /* __CONFIG_H */ 93