1 /* 2 * (C) Copyright 2014 3 * Vikas Manocha, STMicroelectronics, <vikas.manocha@st.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __CONFIG_STV0991_H 9 #define __CONFIG_STV0991_H 10 #define CONFIG_SYS_DCACHE_OFF 11 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH 12 #define CONFIG_BOARD_EARLY_INIT_F 13 14 #define CONFIG_SYS_CORTEX_R4 15 16 #define CONFIG_SYS_NO_FLASH 17 18 /* ram memory-related information */ 19 #define CONFIG_NR_DRAM_BANKS 1 20 #define PHYS_SDRAM_1 0x00000000 21 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 22 #define PHYS_SDRAM_1_SIZE 0x00198000 23 24 #define CONFIG_ENV_SIZE 0x10000 25 #define CONFIG_ENV_IS_IN_SPI_FLASH 26 #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 27 #define CONFIG_ENV_OFFSET 0x30000 28 #define CONFIG_ENV_ADDR \ 29 (PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE) 30 #define CONFIG_SYS_MAXARGS 16 31 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024) 32 33 /* serial port (PL011) configuration */ 34 #define CONFIG_BAUDRATE 115200 35 #define CONFIG_PL01X_SERIAL 36 37 /* user interface */ 38 #define CONFIG_SYS_CBSIZE 1024 39 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 40 +sizeof(CONFIG_SYS_PROMPT) + 16) 41 42 /* MISC */ 43 #define CONFIG_SYS_LOAD_ADDR 0x00000000 44 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 45 #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 46 #define CONFIG_SYS_INIT_SP_OFFSET \ 47 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 48 /* U-Boot Load Address */ 49 #define CONFIG_SYS_TEXT_BASE 0x00010000 50 #define CONFIG_SYS_INIT_SP_ADDR \ 51 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 52 53 /* GMAC related configs */ 54 55 #define CONFIG_MII 56 #define CONFIG_DW_ALTDESCRIPTOR 57 #define CONFIG_PHY_MICREL 58 59 /* Command support defines */ 60 #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ 61 62 #define CONFIG_SYS_MEMTEST_START 0x0000 63 #define CONFIG_SYS_MEMTEST_END 1024*1024 64 65 /* Misc configuration */ 66 #define CONFIG_SYS_LONGHELP 67 #define CONFIG_CMDLINE_EDITING 68 69 #define CONFIG_BOOTCOMMAND "go 0x40040000" 70 71 /* 72 + * QSPI support 73 + */ 74 #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ 75 #define CONFIG_CQSPI_DECODER 0 76 #define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000 77 #define CONFIG_BOUNCE_BUFFER 78 79 #endif 80 81 #endif /* __CONFIG_H */ 82