1 /* 2 * (C) Copyright 2014 3 * Vikas Manocha, STMicroelectronics, <vikas.manocha@st.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __CONFIG_STV0991_H 9 #define __CONFIG_STV0991_H 10 #define CONFIG_SYS_DCACHE_OFF 11 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH 12 13 #define CONFIG_SYS_CORTEX_R4 14 15 /* ram memory-related information */ 16 #define CONFIG_NR_DRAM_BANKS 1 17 #define PHYS_SDRAM_1 0x00000000 18 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 19 #define PHYS_SDRAM_1_SIZE 0x00198000 20 21 #define CONFIG_ENV_SIZE 0x10000 22 #define CONFIG_ENV_IS_IN_SPI_FLASH 23 #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 24 #define CONFIG_ENV_OFFSET 0x30000 25 #define CONFIG_ENV_ADDR \ 26 (PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE) 27 #define CONFIG_SYS_MAXARGS 16 28 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024) 29 30 /* serial port (PL011) configuration */ 31 #define CONFIG_BAUDRATE 115200 32 #define CONFIG_PL01X_SERIAL 33 34 /* user interface */ 35 #define CONFIG_SYS_CBSIZE 1024 36 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 37 +sizeof(CONFIG_SYS_PROMPT) + 16) 38 39 /* MISC */ 40 #define CONFIG_SYS_LOAD_ADDR 0x00000000 41 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 42 #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 43 #define CONFIG_SYS_INIT_SP_OFFSET \ 44 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 45 /* U-Boot Load Address */ 46 #define CONFIG_SYS_TEXT_BASE 0x00010000 47 #define CONFIG_SYS_INIT_SP_ADDR \ 48 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 49 50 /* GMAC related configs */ 51 52 #define CONFIG_MII 53 #define CONFIG_DW_ALTDESCRIPTOR 54 #define CONFIG_PHY_MICREL 55 56 /* Command support defines */ 57 #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ 58 59 #define CONFIG_SYS_MEMTEST_START 0x0000 60 #define CONFIG_SYS_MEMTEST_END 1024*1024 61 62 /* Misc configuration */ 63 #define CONFIG_SYS_LONGHELP 64 #define CONFIG_CMDLINE_EDITING 65 66 #define CONFIG_BOOTCOMMAND "go 0x40040000" 67 68 /* 69 + * QSPI support 70 + */ 71 #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ 72 #define CONFIG_CQSPI_DECODER 0 73 #define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000 74 #define CONFIG_BOUNCE_BUFFER 75 76 #endif 77 78 #endif /* __CONFIG_H */ 79