1 /* 2 * include/configs/stout.h 3 * This file is Stout board configuration. 4 * 5 * Copyright (C) 2015 Renesas Electronics Europe GmbH 6 * Copyright (C) 2015 Renesas Electronics Corporation 7 * Copyright (C) 2015 Cogent Embedded, Inc. 8 * 9 * SPDX-License-Identifier: GPL-2.0 10 */ 11 12 #ifndef __STOUT_H 13 #define __STOUT_H 14 15 #undef DEBUG 16 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Stout" 17 18 #include "rcar-gen2-common.h" 19 20 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT) 21 #define CONFIG_SYS_TEXT_BASE 0xB0000000 22 #else 23 #define CONFIG_SYS_TEXT_BASE 0xE8080000 24 #endif 25 26 /* STACK */ 27 #if defined(CONFIGF_RMOBILE_EXTRAM_BOOT) 28 #define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC 29 #else 30 #define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC 31 #endif 32 #define STACK_AREA_SIZE 0xC000 33 #define LOW_LEVEL_MERAM_STACK \ 34 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 35 36 /* MEMORY */ 37 #define RCAR_GEN2_SDRAM_BASE 0x40000000 38 #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) 39 #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 40 41 /* SCIF */ 42 #define CONFIG_SCIF_A 43 44 /* SPI */ 45 #define CONFIG_SPI 46 #define CONFIG_SH_QSPI 47 #define CONFIG_SPI_FLASH_QUAD 48 49 /* SH Ether */ 50 #define CONFIG_SH_ETHER_USE_PORT 0 51 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 52 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 53 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 54 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 55 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 56 #define CONFIG_BITBANGMII 57 #define CONFIG_BITBANGMII_MULTI 58 59 /* I2C */ 60 #define CONFIG_SYS_I2C 61 #define CONFIG_SYS_I2C_RCAR 62 #define CONFIG_SYS_RCAR_I2C0_SPEED 400000 63 #define CONFIG_SYS_RCAR_I2C1_SPEED 400000 64 #define CONFIG_SYS_RCAR_I2C2_SPEED 400000 65 #define CONFIG_SYS_RCAR_I2C3_SPEED 400000 66 #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4 67 68 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 69 70 /* Board Clock */ 71 #define RMOBILE_XTAL_CLK 20000000u 72 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 73 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 74 #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 75 #define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2) 76 #define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15) 77 #define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12) 78 79 #define CONFIG_SYS_TMU_CLK_DIV 4 80 81 /* USB */ 82 #define CONFIG_USB_EHCI_RMOBILE 83 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 84 85 /* Module stop status bits */ 86 /* INTC-RT */ 87 #define CONFIG_SMSTP0_ENA 0x00400000 88 /* MSIF, SCIFA0 */ 89 #define CONFIG_SMSTP2_ENA 0x00002010 90 /* INTC-SYS, IRQC */ 91 #define CONFIG_SMSTP4_ENA 0x00000180 92 93 /* SDHI */ 94 #define CONFIG_SH_SDHI_FREQ 97500000 95 96 #endif /* __STOUT_H */ 97