1 /* 2 * include/configs/stout.h 3 * This file is Stout board configuration. 4 * 5 * Copyright (C) 2015 Renesas Electronics Europe GmbH 6 * Copyright (C) 2015 Renesas Electronics Corporation 7 * Copyright (C) 2015 Cogent Embedded, Inc. 8 * 9 * SPDX-License-Identifier: GPL-2.0 10 */ 11 12 #ifndef __STOUT_H 13 #define __STOUT_H 14 15 #undef DEBUG 16 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Stout" 17 18 #include "rcar-gen2-common.h" 19 20 /* STACK */ 21 #if defined(CONFIGF_RMOBILE_EXTRAM_BOOT) 22 #define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC 23 #else 24 #define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC 25 #endif 26 #define STACK_AREA_SIZE 0xC000 27 #define LOW_LEVEL_MERAM_STACK \ 28 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 29 30 /* MEMORY */ 31 #define RCAR_GEN2_SDRAM_BASE 0x40000000 32 #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) 33 #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 34 35 /* SCIF */ 36 #define CONFIG_SCIF_A 37 38 /* SPI */ 39 #define CONFIG_SPI 40 #define CONFIG_SPI_FLASH_QUAD 41 42 /* SH Ether */ 43 #define CONFIG_SH_ETHER_USE_PORT 0 44 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 45 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 46 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 47 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 48 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 49 #define CONFIG_BITBANGMII 50 #define CONFIG_BITBANGMII_MULTI 51 52 /* I2C */ 53 #define CONFIG_SYS_I2C 54 #define CONFIG_SYS_I2C_RCAR 55 #define CONFIG_SYS_RCAR_I2C0_SPEED 400000 56 #define CONFIG_SYS_RCAR_I2C1_SPEED 400000 57 #define CONFIG_SYS_RCAR_I2C2_SPEED 400000 58 #define CONFIG_SYS_RCAR_I2C3_SPEED 400000 59 #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4 60 61 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 62 63 /* Board Clock */ 64 #define RMOBILE_XTAL_CLK 20000000u 65 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 66 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 67 #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 68 #define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2) 69 #define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15) 70 #define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12) 71 72 #define CONFIG_SYS_TMU_CLK_DIV 4 73 74 /* USB */ 75 #define CONFIG_USB_EHCI_RMOBILE 76 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 77 78 /* Module stop status bits */ 79 /* INTC-RT */ 80 #define CONFIG_SMSTP0_ENA 0x00400000 81 /* MSIF, SCIFA0 */ 82 #define CONFIG_SMSTP2_ENA 0x00002010 83 /* INTC-SYS, IRQC */ 84 #define CONFIG_SMSTP4_ENA 0x00000180 85 86 /* SDHI */ 87 #define CONFIG_SH_SDHI_FREQ 97500000 88 89 #endif /* __STOUT_H */ 90