1 /* 2 * include/configs/stout.h 3 * This file is Stout board configuration. 4 * 5 * Copyright (C) 2015 Renesas Electronics Europe GmbH 6 * Copyright (C) 2015 Renesas Electronics Corporation 7 * Copyright (C) 2015 Cogent Embedded, Inc. 8 * 9 * SPDX-License-Identifier: GPL-2.0 10 */ 11 12 #ifndef __STOUT_H 13 #define __STOUT_H 14 15 #undef DEBUG 16 #define CONFIG_R8A7790 17 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Stout" 18 19 #include "rcar-gen2-common.h" 20 21 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT) 22 #define CONFIG_SYS_TEXT_BASE 0xB0000000 23 #else 24 #define CONFIG_SYS_TEXT_BASE 0xE8080000 25 #endif 26 27 /* STACK */ 28 #if defined(CONFIGF_RMOBILE_EXTRAM_BOOT) 29 #define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC 30 #else 31 #define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC 32 #endif 33 #define STACK_AREA_SIZE 0xC000 34 #define LOW_LEVEL_MERAM_STACK \ 35 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 36 37 /* MEMORY */ 38 #define RCAR_GEN2_SDRAM_BASE 0x40000000 39 #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) 40 #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 41 42 /* SCIF */ 43 #define CONFIG_SCIF_CONSOLE 44 #define CONFIG_SCIF_A 45 46 /* SPI */ 47 #define CONFIG_SPI 48 #define CONFIG_SH_QSPI 49 #define CONFIG_SPI_FLASH_QUAD 50 #define CONFIG_SYS_NO_FLASH 51 52 /* SH Ether */ 53 #define CONFIG_SH_ETHER 54 #define CONFIG_SH_ETHER_USE_PORT 0 55 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 56 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 57 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 58 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 59 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 60 #define CONFIG_PHYLIB 61 #define CONFIG_PHY_MICREL 62 #define CONFIG_BITBANGMII 63 #define CONFIG_BITBANGMII_MULTI 64 65 /* I2C */ 66 #define CONFIG_SYS_I2C 67 #define CONFIG_SYS_I2C_RCAR 68 #define CONFIG_SYS_RCAR_I2C0_SPEED 400000 69 #define CONFIG_SYS_RCAR_I2C1_SPEED 400000 70 #define CONFIG_SYS_RCAR_I2C2_SPEED 400000 71 #define CONFIG_SYS_RCAR_I2C3_SPEED 400000 72 #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4 73 74 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 75 76 /* Board Clock */ 77 #define RMOBILE_XTAL_CLK 20000000u 78 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 79 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 80 #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 81 #define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2) 82 #define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15) 83 #define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12) 84 85 #define CONFIG_SYS_TMU_CLK_DIV 4 86 87 /* USB */ 88 #define CONFIG_USB_EHCI 89 #define CONFIG_USB_EHCI_RMOBILE 90 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 91 92 /* MMC */ 93 #define CONFIG_GENERIC_MMC 94 95 /* Module stop status bits */ 96 /* INTC-RT */ 97 #define CONFIG_SMSTP0_ENA 0x00400000 98 /* MSIF, SCIFA0 */ 99 #define CONFIG_SMSTP2_ENA 0x00002010 100 /* INTC-SYS, IRQC */ 101 #define CONFIG_SMSTP4_ENA 0x00000180 102 103 /* SDHI */ 104 #define CONFIG_SH_SDHI_FREQ 97500000 105 106 #endif /* __STOUT_H */ 107