xref: /openbmc/u-boot/include/configs/stout.h (revision ec7113fb)
121871138SVladimir Barinov /*
221871138SVladimir Barinov  * include/configs/stout.h
321871138SVladimir Barinov  *     This file is Stout board configuration.
421871138SVladimir Barinov  *
521871138SVladimir Barinov  * Copyright (C) 2015 Renesas Electronics Europe GmbH
621871138SVladimir Barinov  * Copyright (C) 2015 Renesas Electronics Corporation
721871138SVladimir Barinov  * Copyright (C) 2015 Cogent Embedded, Inc.
821871138SVladimir Barinov  *
921871138SVladimir Barinov  * SPDX-License-Identifier: GPL-2.0
1021871138SVladimir Barinov  */
1121871138SVladimir Barinov 
1221871138SVladimir Barinov #ifndef __STOUT_H
1321871138SVladimir Barinov #define __STOUT_H
1421871138SVladimir Barinov 
1521871138SVladimir Barinov #undef DEBUG
161cc95f6eSNobuhiro Iwamatsu #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Stout"
1721871138SVladimir Barinov 
1821871138SVladimir Barinov #include "rcar-gen2-common.h"
1921871138SVladimir Barinov 
20*ec7113fbSMarek Vasut #define CONFIG_SYS_INIT_SP_ADDR		0x4f000000
21*ec7113fbSMarek Vasut #define STACK_AREA_SIZE			0x00100000
2221871138SVladimir Barinov #define LOW_LEVEL_MERAM_STACK \
2321871138SVladimir Barinov 		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
2421871138SVladimir Barinov 
2521871138SVladimir Barinov /* MEMORY */
2621871138SVladimir Barinov #define RCAR_GEN2_SDRAM_BASE		0x40000000
2721871138SVladimir Barinov #define RCAR_GEN2_SDRAM_SIZE		(1024u * 1024 * 1024)
2821871138SVladimir Barinov #define RCAR_GEN2_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)
2921871138SVladimir Barinov 
3021871138SVladimir Barinov /* SCIF */
3121871138SVladimir Barinov #define CONFIG_SCIF_A
3221871138SVladimir Barinov 
3321871138SVladimir Barinov /* SPI */
3421871138SVladimir Barinov #define CONFIG_SPI
3521871138SVladimir Barinov #define CONFIG_SPI_FLASH_QUAD
3621871138SVladimir Barinov 
3721871138SVladimir Barinov /* SH Ether */
3821871138SVladimir Barinov #define CONFIG_SH_ETHER_USE_PORT	0
3921871138SVladimir Barinov #define CONFIG_SH_ETHER_PHY_ADDR	0x1
4021871138SVladimir Barinov #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
4121871138SVladimir Barinov #define CONFIG_SH_ETHER_CACHE_WRITEBACK
4221871138SVladimir Barinov #define CONFIG_SH_ETHER_CACHE_INVALIDATE
43*ec7113fbSMarek Vasut #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
4421871138SVladimir Barinov #define CONFIG_BITBANGMII
4521871138SVladimir Barinov #define CONFIG_BITBANGMII_MULTI
4621871138SVladimir Barinov 
4721871138SVladimir Barinov /* Board Clock */
4821871138SVladimir Barinov #define RMOBILE_XTAL_CLK	20000000u
4921871138SVladimir Barinov #define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
50*ec7113fbSMarek Vasut #define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
5121871138SVladimir Barinov 
5221871138SVladimir Barinov #define CONFIG_SYS_TMU_CLK_DIV	4
5321871138SVladimir Barinov 
54*ec7113fbSMarek Vasut #define CONFIG_EXTRA_ENV_SETTINGS	\
55*ec7113fbSMarek Vasut 	"fdt_high=0xffffffff\0"		\
56*ec7113fbSMarek Vasut 	"initrd_high=0xffffffff\0"
5721871138SVladimir Barinov 
58*ec7113fbSMarek Vasut /* SPL support */
59*ec7113fbSMarek Vasut #define CONFIG_SPL_TEXT_BASE		0xe6304000
60*ec7113fbSMarek Vasut #define CONFIG_SPL_STACK		0xe6340000
61*ec7113fbSMarek Vasut #define CONFIG_SPL_MAX_SIZE		0x40000
62*ec7113fbSMarek Vasut #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x140000
6321871138SVladimir Barinov 
64*ec7113fbSMarek Vasut /* TPL support */
65*ec7113fbSMarek Vasut #ifdef CONFIG_TPL_BUILD
66*ec7113fbSMarek Vasut #define CONFIG_CONS_SCIFA0
67*ec7113fbSMarek Vasut #define CONFIG_SH_SCIF_CLK_FREQ		52000000
68*ec7113fbSMarek Vasut #endif
6921871138SVladimir Barinov 
7021871138SVladimir Barinov #endif	/* __STOUT_H */
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