1 /* 2 * Sysam stmark2 board configuration 3 * 4 * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __STMARK2_CONFIG_H 10 #define __STMARK2_CONFIG_H 11 12 #define CONFIG_STMARK2 13 #define CONFIG_HOSTNAME stmark2 14 15 #define CONFIG_MCFUART 16 #define CONFIG_SYS_UART_PORT 0 17 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 18 19 #define LDS_BOARD_TEXT \ 20 board/sysam/stmark2/sbf_dram_init.o (.text*) 21 22 #define CONFIG_TIMESTAMP 23 24 #define CONFIG_BOOTARGS \ 25 "console=ttyS0,115200 root=/dev/ram0 rw " \ 26 "rootfstype=ramfs " \ 27 "rdinit=/bin/init " \ 28 "devtmpfs.mount=1" 29 30 #define CONFIG_BOOTCOMMAND \ 31 "sf probe 0:1 50000000; " \ 32 "sf read ${loadaddr} 0x100000 ${kern_size}; " \ 33 "bootm ${loadaddr}" 34 35 #define CONFIG_EXTRA_ENV_SETTINGS \ 36 "kern_size=0x700000\0" \ 37 "loadaddr=0x40001000\0" \ 38 "-(rootfs)\0" \ 39 "update_uboot=loady ${loadaddr}; " \ 40 "sf probe 0:1 50000000; " \ 41 "sf erase 0 0x80000; " \ 42 "sf write ${loadaddr} 0 ${filesize}\0" \ 43 "update_kernel=loady ${loadaddr}; " \ 44 "setenv kern_size ${filesize}; saveenv; " \ 45 "sf probe 0:1 50000000; " \ 46 "sf erase 0x100000 0x700000; " \ 47 "sf write ${loadaddr} 0x100000 ${filesize}\0" \ 48 "update_rootfs=loady ${loadaddr}; " \ 49 "sf probe 0:1 50000000; " \ 50 "sf erase 0x00800000 0x100000; " \ 51 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \ 52 "" 53 54 /* Realtime clock */ 55 #undef CONFIG_MCFRTC 56 #define CONFIG_RTC_MCFRRTC 57 #define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000 58 59 /* spi not partitions */ 60 #define CONFIG_MTD_DEVICE 61 #define CONFIG_JFFS2_CMDLINE 62 #define CONFIG_JFFS2_DEV "nor0" 63 64 /* Timer */ 65 #define CONFIG_MCFTMR 66 #undef CONFIG_MCFPIT 67 68 /* DSPI and Serial Flash */ 69 #define CONFIG_CF_SPI 70 #define CONFIG_CF_DSPI 71 #define CONFIG_SF_DEFAULT_SPEED 50000000 72 #define CONFIG_SERIAL_FLASH 73 #define CONFIG_HARD_SPI 74 #define CONFIG_SPI_FLASH_ISSI 75 #define CONFIG_ENV_SPI_BUS 0 76 #define CONFIG_ENV_SPI_CS 1 77 78 #define CONFIG_SYS_SBFHDR_SIZE 0x7 79 80 #define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ 81 DSPI_CTAR_PCSSCK_1CLK | \ 82 DSPI_CTAR_PASC(0) | \ 83 DSPI_CTAR_PDT(0) | \ 84 DSPI_CTAR_CSSCK(0) | \ 85 DSPI_CTAR_ASC(0) | \ 86 DSPI_CTAR_DT(1) | \ 87 DSPI_CTAR_BR(6)) 88 #define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0) 89 #define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0) 90 91 /* Input, PCI, Flexbus, and VCO */ 92 #define CONFIG_EXTRA_CLOCK 93 94 #define CONFIG_PRAM 2048 /* 2048 KB */ 95 #define CONFIG_SYS_LONGHELP 96 #define CONFIG_AUTO_COMPLETE 97 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 98 99 /* Print Buffer Size */ 100 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 101 sizeof(CONFIG_SYS_PROMPT) + 16) 102 #define CONFIG_SYS_MAXARGS 16 103 /* Boot Argument Buffer Size */ 104 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 105 106 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000) 107 #define CONFIG_SYS_MBAR 0xFC000000 108 109 /* 110 * Definitions for initial stack pointer and data area (in internal SRAM) 111 */ 112 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 113 /* End of used area in internal SRAM */ 114 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 115 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 116 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \ 117 GENERATED_GBL_DATA_SIZE) - 32) 118 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 119 #define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32) 120 121 /* 122 * Start addresses for the final memory configuration 123 * (Set up by the startup code) 124 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 125 */ 126 #define CONFIG_SYS_SDRAM_BASE 0x40000000 127 #define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */ 128 129 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x400) 130 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) 131 #define CONFIG_SYS_DRAM_TEST 132 133 #if defined(CONFIG_CF_SBF) 134 #define CONFIG_SERIAL_BOOT 135 #endif 136 137 #if defined(CONFIG_SERIAL_BOOT) 138 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) 139 #else 140 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 141 #endif 142 143 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) 144 /* Reserve 256 kB for Monitor */ 145 #define CONFIG_SYS_MONITOR_LEN (256 << 10) 146 /* Reserve 256 kB for malloc() */ 147 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 148 149 /* 150 * For booting Linux, the board info and command line data 151 * have to be in the first 8 MB of memory, since this is 152 * the maximum mapped by the Linux kernel during initialization ?? 153 */ 154 /* Initial Memory map for Linux */ 155 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ 156 (CONFIG_SYS_SDRAM_SIZE << 20)) 157 158 /* Configuration for environment 159 * Environment is embedded in u-boot in the second sector of the flash 160 */ 161 162 #if defined(CONFIG_CF_SBF) 163 #define CONFIG_ENV_IS_IN_SPI_FLASH 1 164 #define CONFIG_ENV_SPI_CS 1 165 #define CONFIG_ENV_OFFSET 0x40000 166 #define CONFIG_ENV_SIZE 0x2000 167 #define CONFIG_ENV_SECT_SIZE 0x10000 168 #endif 169 170 #undef CONFIG_ENV_OVERWRITE 171 172 /* Cache Configuration */ 173 #define CONFIG_SYS_CACHELINE_SIZE 16 174 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 175 CONFIG_SYS_INIT_RAM_SIZE - 8) 176 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 177 CONFIG_SYS_INIT_RAM_SIZE - 4) 178 #define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA) 179 #define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA) 180 #define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \ 181 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 182 CF_ACR_EN | CF_ACR_SM_ALL) 183 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \ 184 CF_CACR_ICINVA | CF_CACR_EUSP) 185 #define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \ 186 CF_CACR_DEC | CF_CACR_DDCM_P | \ 187 CF_CACR_DCINVA) & ~CF_CACR_ICINVA) 188 189 #define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 190 CONFIG_SYS_INIT_RAM_SIZE - 12) 191 192 #endif /* __STMARK2_CONFIG_H */ 193