xref: /openbmc/u-boot/include/configs/stmark2.h (revision 0f44d33536a50ef65259c322fa2d4a058585caf9)
1 /*
2  * Sysam stmark2 board configuration
3  *
4  * (C) Copyright 2017  Angelo Dureghello <angelo@sysam.it>
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8 
9 #ifndef __STMARK2_CONFIG_H
10 #define __STMARK2_CONFIG_H
11 
12 #define CONFIG_HOSTNAME			stmark2
13 
14 #define CONFIG_MCFUART
15 #define CONFIG_SYS_UART_PORT		0
16 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600 , 19200 , 38400 , 57600, 115200 }
17 
18 #define LDS_BOARD_TEXT						\
19 	board/sysam/stmark2/sbf_dram_init.o (.text*)
20 
21 #define CONFIG_TIMESTAMP
22 
23 #define CONFIG_BOOTARGS						\
24 	"console=ttyS0,115200 root=/dev/ram0 rw "		\
25 		"rootfstype=ramfs "				\
26 		"rdinit=/bin/init "				\
27 		"devtmpfs.mount=1"
28 
29 #define CONFIG_BOOTCOMMAND					\
30 	"sf probe 0:1 50000000; "				\
31 	"sf read ${loadaddr} 0x100000 ${kern_size}; "		\
32 	"bootm ${loadaddr}"
33 
34 #define CONFIG_EXTRA_ENV_SETTINGS				\
35 	"kern_size=0x700000\0"					\
36 	"loadaddr=0x40001000\0"					\
37 		"-(rootfs)\0"					\
38 	"update_uboot=loady ${loadaddr}; "			\
39 		"sf probe 0:1 50000000; "			\
40 		"sf erase 0 0x80000; "				\
41 		"sf write ${loadaddr} 0 ${filesize}\0"		\
42 	"update_kernel=loady ${loadaddr}; "			\
43 		"setenv kern_size ${filesize}; saveenv; "	\
44 		"sf probe 0:1 50000000; "			\
45 		"sf erase 0x100000 0x700000; "			\
46 		"sf write ${loadaddr} 0x100000 ${filesize}\0"	\
47 	"update_rootfs=loady ${loadaddr}; "			\
48 		"sf probe 0:1 50000000; "			\
49 		"sf erase 0x00800000 0x100000; "		\
50 		"sf write ${loadaddr} 0x00800000 ${filesize}\0"	\
51 	""
52 
53 /* Realtime clock */
54 #undef CONFIG_MCFRTC
55 #define CONFIG_RTC_MCFRRTC
56 #define CONFIG_SYS_MCFRRTC_BASE		0xFC0A8000
57 
58 /* spi not partitions */
59 #define CONFIG_MTD_DEVICE
60 #define CONFIG_JFFS2_CMDLINE
61 #define CONFIG_JFFS2_DEV		"nor0"
62 
63 /* Timer */
64 #define CONFIG_MCFTMR
65 #undef CONFIG_MCFPIT
66 
67 /* DSPI and Serial Flash */
68 #define CONFIG_CF_DSPI
69 #define CONFIG_SF_DEFAULT_SPEED		50000000
70 #define CONFIG_SERIAL_FLASH
71 #define CONFIG_HARD_SPI
72 #define CONFIG_SPI_FLASH_ISSI
73 #define CONFIG_ENV_SPI_BUS		0
74 #define CONFIG_ENV_SPI_CS		1
75 
76 #define CONFIG_SYS_SBFHDR_SIZE		0x7
77 
78 #define CONFIG_SYS_DSPI_CTAR0		(DSPI_CTAR_TRSZ(7) | \
79 					DSPI_CTAR_PCSSCK_1CLK | \
80 					DSPI_CTAR_PASC(0) | \
81 					DSPI_CTAR_PDT(0) | \
82 					DSPI_CTAR_CSSCK(0) | \
83 					DSPI_CTAR_ASC(0) | \
84 					DSPI_CTAR_DT(1) | \
85 					DSPI_CTAR_BR(6))
86 #define CONFIG_SYS_DSPI_CTAR1		(CONFIG_SYS_DSPI_CTAR0)
87 #define CONFIG_SYS_DSPI_CTAR2		(CONFIG_SYS_DSPI_CTAR0)
88 
89 /* Input, PCI, Flexbus, and VCO */
90 #define CONFIG_EXTRA_CLOCK
91 
92 #define CONFIG_PRAM			2048	/* 2048 KB */
93 #define CONFIG_SYS_LONGHELP
94 #define CONFIG_AUTO_COMPLETE
95 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
96 
97 /* Print Buffer Size */
98 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
99 					sizeof(CONFIG_SYS_PROMPT) + 16)
100 #define CONFIG_SYS_MAXARGS		16
101 /* Boot Argument Buffer Size    */
102 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
103 
104 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x10000)
105 #define CONFIG_SYS_MBAR			0xFC000000
106 
107 /*
108  * Definitions for initial stack pointer and data area (in internal SRAM)
109  */
110 #define CONFIG_SYS_INIT_RAM_ADDR	0x80000000
111 /* End of used area in internal SRAM */
112 #define CONFIG_SYS_INIT_RAM_SIZE	0x10000
113 #define CONFIG_SYS_INIT_RAM_CTRL	0x221
114 #define CONFIG_SYS_GBL_DATA_OFFSET	((CONFIG_SYS_INIT_RAM_SIZE - \
115 					GENERATED_GBL_DATA_SIZE) - 32)
116 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
117 #define CONFIG_SYS_SBFHDR_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - 32)
118 
119 /*
120  * Start addresses for the final memory configuration
121  * (Set up by the startup code)
122  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
123  */
124 #define CONFIG_SYS_SDRAM_BASE		0x40000000
125 #define CONFIG_SYS_SDRAM_SIZE		128	/* SDRAM size in MB */
126 
127 #define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0x400)
128 #define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
129 #define CONFIG_SYS_DRAM_TEST
130 
131 #if defined(CONFIG_CF_SBF)
132 #define CONFIG_SERIAL_BOOT
133 #endif
134 
135 #if defined(CONFIG_SERIAL_BOOT)
136 #define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_TEXT_BASE + 0x400)
137 #else
138 #define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
139 #endif
140 
141 #define CONFIG_SYS_BOOTPARAMS_LEN	(64 * 1024)
142 /* Reserve 256 kB for Monitor */
143 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)
144 /* Reserve 256 kB for malloc() */
145 #define CONFIG_SYS_MALLOC_LEN		(256 << 10)
146 
147 /*
148  * For booting Linux, the board info and command line data
149  * have to be in the first 8 MB of memory, since this is
150  * the maximum mapped by the Linux kernel during initialization ??
151  */
152 /* Initial Memory map for Linux */
153 #define CONFIG_SYS_BOOTMAPSZ		(CONFIG_SYS_SDRAM_BASE + \
154 					(CONFIG_SYS_SDRAM_SIZE << 20))
155 
156 /* Configuration for environment
157  * Environment is embedded in u-boot in the second sector of the flash
158  */
159 
160 #if defined(CONFIG_CF_SBF)
161 #define CONFIG_ENV_IS_IN_SPI_FLASH	1
162 #define CONFIG_ENV_SPI_CS		1
163 #define CONFIG_ENV_OFFSET		0x40000
164 #define CONFIG_ENV_SIZE			0x2000
165 #define CONFIG_ENV_SECT_SIZE		0x10000
166 #endif
167 
168 #undef CONFIG_ENV_OVERWRITE
169 
170 /* Cache Configuration */
171 #define CONFIG_SYS_CACHELINE_SIZE	16
172 #define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
173 					 CONFIG_SYS_INIT_RAM_SIZE - 8)
174 #define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
175 					 CONFIG_SYS_INIT_RAM_SIZE - 4)
176 #define CONFIG_SYS_ICACHE_INV		(CF_CACR_BCINVA + CF_CACR_ICINVA)
177 #define CONFIG_SYS_DCACHE_INV		(CF_CACR_DCINVA)
178 #define CONFIG_SYS_CACHE_ACR2		(CONFIG_SYS_SDRAM_BASE | \
179 					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
180 					 CF_ACR_EN | CF_ACR_SM_ALL)
181 #define CONFIG_SYS_CACHE_ICACR		(CF_CACR_BEC | CF_CACR_IEC | \
182 					 CF_CACR_ICINVA | CF_CACR_EUSP)
183 #define CONFIG_SYS_CACHE_DCACR		((CONFIG_SYS_CACHE_ICACR | \
184 					 CF_CACR_DEC | CF_CACR_DDCM_P | \
185 					 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
186 
187 #define CACR_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
188 					CONFIG_SYS_INIT_RAM_SIZE - 12)
189 
190 #endif /* __STMARK2_CONFIG_H */
191